• Title/Summary/Keyword: copper interconnection

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In-Situ Optical Monitoring of Electrochemical Copper Deposition Process for Semiconductor Interconnection Technology

  • Hong, Sang-Jeen;Wang, Li;Seo, Dong-Sun;Yoon, Tae-Sik
    • Transactions on Electrical and Electronic Materials
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    • v.13 no.2
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    • pp.78-84
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    • 2012
  • An in-situ optical monitoring method for real-time process monitoring of electrochemical copper deposition (CED) is presented. Process variables to be controlled in achieving desired process results are numerous in the CED process, and the importance of the chemical bath conditions cannot be overemphasized for a successful process. Conventional monitoring of the chemical solution for CED relies on the pH value of the solution, electrical voltage level for the reduction of metal cations, and gravity measurement by immersing sensors into a plating bath. We propose a nonintrusive optical monitoring technique using three types of optical sensors such as chromatic sensors and UV/VIS spectroscopy sensors as potential candidates as a feasible optical monitoring method. By monitoring the color of the plating solution in the bath, we revealed that optically acquired information is strongly related to the thickness of the deposited copper on the wafers, and that the chromatic information is inversely proportional to the ratio of $Cu$ (111) and {$Cu$ (111)+$Cu$ (200)}, which can used to measure the quality of the chemical solution for electrochemical copper deposition in advanced interconnection technology.

Characteristics of copper wire wedge bonding

  • Tian, Y.;Zhou, Y.;Mayer, M.;Won, S.J.;Lee, S.M.;Cho, S.Y.;Jung, J.P.
    • Proceedings of the KWS Conference
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    • 2005.06a
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    • pp.34-36
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    • 2005
  • Copper wire bonding is an alternative interconnection technology that serves as a viable and cost saving alternative to gold wire bonding. In this paper, ultrasonic wedge bonding with $25{\mu}m$ copper wire on Au/Ni/Cu metallization of a PCB substrate was performed at ambient temperature. The central composite design of experiment (DOE) approach was applied to optimize the copper wire wedge bonding process parameters. After that, pull test of the wedge bond was performed to study the bond strength and to find the optimum bonding parameters. SEM was used to observe the cross section of the wedge bond. The pull test results show good performance of the wedge bond. Additionally, DOE results gave the optimized parameter for both the first bond and the second bond. Cross section analysis shows a continuous interconnection between the copper wire and Au/Ni/Cu metallization. The diffusion of Cu into the Au layer was also observed.

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Cleaning Behavior of Aqueous Solution Containing Amine or Carboxylic Acid in Cu-interconnection Process (아민과 카르복실산이 함유된 수계용액의 구리 배선 공정의 세정특성)

  • Ko, Cheonkwang;Lee, Won Gyu
    • Korean Chemical Engineering Research
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    • v.59 no.4
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    • pp.632-638
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    • 2021
  • With the copper interconnection in the semiconductor process, complex residues including copper oxide, fluoride, and polymeric fluorocarbon are formed by plasma etching. In this study, a cleaning solution was prepared with a component having an amine group (-NH2) and a carboxyl group (-COOH), and the characteristics of removing post-etch residues in the copper wiring process were analyzed. In the cleaning solution containing an amine group, the length of the component substituted with nitrogen and the length of the carbon chain influenced the cleaning effect, and the etching rate of copper oxide increased as the pH of the cleaning solution increased. The activity of the amine group is in the basic region, and the activity of the carboxyl group is in the acidic region, and the cleaning process proceeds through complex formation with copper or copper oxide in each region.

Electrodeposition for the Fabrication of Copper Interconnection in Semiconductor Devices (반도체 소자용 구리 배선 형성을 위한 전해 도금)

  • Kim, Myung Jun;Kim, Jae Jeong
    • Korean Chemical Engineering Research
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    • v.52 no.1
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    • pp.26-39
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    • 2014
  • Cu interconnection in electronic devices is fabricated via damascene process including Cu electrodeposition. In this review, Cu electrodeposition and superfilling for fabricating Cu interconnection are introduced. Superfilling results from the influences of organic additives in the electrolyte for Cu electrodeposition, and this is enabled by the local enhancement of Cu electrodeposition at the bottom of filling feature formed on the wafer through manipulating the surface coverage of organic additives. The dimension of metal interconnection has been constantly reduced to increase the integrity of electronic devices, and the width of interconnection reaches the range of few tens of nanometer. This size reduction raises the issues, which are the deterioration of electrical property and the reliability of Cu interconnection, and the difficulty of Cu superfilling. The various researches on the development of organic additives for the modification of Cu microstructure, the application of pulse and pulse-reverse electrodeposition, Cu-based alloy superfilling for improvement of reliability, and the enhancement of superfilling phenomenon to overcome the current problems are addressed in this review.

Control of Slurry Flow Rate in Copper CMP (구리 CMP시 슬러리 Flow Rate의 조절)

  • Kim, Tae-Gun;Kim, Nam-Hoon;Kim, Sang-Yong;Seo, Yong-Jin;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.34-37
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    • 2004
  • Recently advancing mobile communication tools and I.T industry, semiconductor device is requested more integrated, faster operation time and more scaled-down. Because of these reasons semiconductor device is requested multilayer interconnection. For the multilayer interconnection chemical mechanical polishing (CMP) becomes one of the most useful process in semiconductor manufacturing process. In this experiment, we focus on understand the characterize and improve the CMP technology by control of slurry flow rate. Consequently, we obtain that optimal flow rate of slurry is 170ml/min, since optimal conditions are less chemical flow and performance high with good selectivity to Ta. If we apply this results to copper CMP process. it is thought that we will be able to obtain better yield.

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Cu Metallization for Giga Level Devices Using Electrodeposition (전해 도금을 이용한 기가급 소자용 구리배선 공정)

  • Kim, Soo-Kil;Kang, Min-Cheol;Koo, Hyo-Chol;Cho, Sung-Ki;Kim, Jae-Jeong;Yeo, Jong-Kee
    • Journal of the Korean Electrochemical Society
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    • v.10 no.2
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    • pp.94-103
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    • 2007
  • The transition of interconnection metal from aluminum alloy to copper has been introduced to meet the requirements of high speed, ultra-large scale integration, and high reliability of the semiconductor device. Since copper, which has low electrical resistivity and high resistance to degradation, has different electrical and material characteristics compared to aluminum alloy, new related materials and processes are needed to successfully fabricate the copper interconnection. In this review, some important factors of multilevel copper damascene process have been surveyed such as diffusion barrier, seed layer, organic additives for bottom-up electro/electroless deposition, chemical mechanical polishing, and capping layer to introduce the related issues and recent research trends on them.

Reflow of copper film for the interconnection of the next generation semiconductor devices (차세대 반도체 소자의 배선을 위한 구리박막의 reflow)

  • 김동원;김갑중;권인호;이승윤;라사균;박종욱
    • Journal of the Korean Vacuum Society
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    • v.6 no.3
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    • pp.206-212
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    • 1997
  • The reflow characteristics of copper, which is expected to be used as interconnection materials in the next generation semiconductor devices, were investigated. Copper films were deposited on hole and trench patterns by metal organic chemical vapor deposition and annealed in nitrogen and oxygen ambient with the annealing temperatures ranging from $350^{\circ}C$ to $550^{\circ}C$. Copper films were not reflowed into the patterns upon the annealing in nitrogen ambient, but reflowed at the annealing temperature higher than $450^{\circ}C$ in oxygen ambient. It is considered that the reflow takes place as the heat generated by the oxidation of copper liquefies the copper film partly and the liquid copper fills the patterns for minimizing the surface energy and the potential energy. Upon the annealing in oxygen ambient, the copper oxide whose thickness was less than 300$\AA$ formed at the surface of an agglomerate and the resistivity of copper film increased drastically at an annealing temperature of $550^{\circ}C$ due to the copper agglomeration.

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Investigation of TaNx diffusion barrier properties using Plasma-Enhanced ALD for copper interconnection

  • Han, Dong-Seok;Mun, Dae-Yong;Gwon, Tae-Seok;Kim, Ung-Seon;Hwang, Chang-Muk;Park, Jong-Wan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.178-178
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    • 2010
  • With the scaling down of ULSI(Ultra Large Scale Integration) circuit of CMOS(Complementary Metal Oxide Semiconductor)based electronic devices, the electronic devices become more faster and smaller size that are promising field of semiconductor market. However, very narrow line width has some disadvantages. For example, because of narrow line width, deposition of conformal and thin barrier is difficult. Besides, proportion of barrier width is large, thus resistance is high. Conventional PVD(Physical Vapor Deposition) thin films are not able to gain a good quality and conformal layer. Hence, in order to get over these side effects, deposition of thin layer used of ALD(Atomic Layer Deposition) is important factor. Furthermore, it is essential that copper atomic diffusion into dielectric layer such as silicon oxide and hafnium oxide. If copper line is not surrounded by diffusion barrier, it cause the leakage current and devices degradation. There are some possible methods for improving the these secondary effects. In this study, TaNx, is used of Tertiarybutylimido tris (ethylamethlamino) tantalum (TBITEMAT), was deposited on the 24nm sized trench silicon oxide/silicon bi-layer substrate with good step coverage and high quality film using plasma enhanced atomic layer deposition (PEALD). And then copper was deposited on TaNx barrier using same deposition method. The thickness of TaNx was 4~5 nm. TaNx film was deposited the condition of under $300^{\circ}C$ and copper deposition temperature was under $120^{\circ}C$, and feeding time of TaNx and copper were 5 seconds and 5 seconds, relatively. Purge time of TaNx and copper films were 10 seconds and 6 seconds, relatively. XRD, TEM, AFM, I-V measurement(for testing leakage current and stability) were used to analyze this work. With this work, thin barrier layer(4~5nm) with deposited PEALD has good step coverage and good thermal stability. So the barrier properties of PEALD TaNx film are desirable for copper interconnection.

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Study of defect characteristics by electrochemical plating thickness in copper CMP (Copper CMP에서 Electrochemical Plating 두께에 따른 Defect 특성 연구)

  • Kim, Tae-Gun;Kim, Nam-Hoon;Kim, Sang-Yong;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.125-126
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    • 2005
  • Recently semiconductor devices are required more smaller scale and more powerful performance. For smaller scale of device, multilayer structure is proposed. And, for the higher performance, interconnection material is change to copper, because copper has high EM(Electro-migration)and low resistivity. Then copper CMP process is a great role in a multilayer formation of semiconductor. Copper process is different from aluminum process. ECP process is one of the copper processes. In this paper, we focused on the defects tendency by copper thickness which filled using ECP process. we observed hump high and dishing. Conclusively, hump hight reduced at copper thickness increased Also dishing reduced.

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