• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.635-636
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• 2006

A pulse with modulation(PWM) that keeps a constant angle of dwell and adjust duty ratio is a good method to control a speed of SRM. And a method of one pulse control is proper a operation on range of high speed in SRM for a good energy efficiency. Because PWM method is more safety than one pulse method, conversion of those is best choice according the speed range. So, some algorithm is need for smooth conversion of the mode of control. This paper presents a factor of conversion that proper the conversion of control mode between PWM and one pulse method This factor is from estimation of torque and proper at the variable range of conversion and show the better conversion characteristic than constant factor of conversion.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.12A
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• pp.1285-1290
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• 2004

In this paper, a new algorithm for contention resolution in optical burst switched network is proposed and simulated. The proposed algorithm is made from the all mixing of wavelength conversion, deflection routing, segmentation, and optical fiber delay line buffering. We analysis the performance of the proposed contention resolution algorithm by using ns-2. The application of the algorithm into Korea backbone network shows the superior performance of a low burst loss probability.

• Journal of Information Processing Systems
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• v.13 no.1
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• pp.114-127
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• 2017

This paper proposes a color image coding algorithm based on shape-adaptive all phase biorthogonal transform (SA-APBT). This algorithm is implemented through four procedures: color space conversion, image segmentation, shape coding, and texture coding. Region-of-interest (ROI) and background area are obtained by image segmentation. Shape coding uses chain code. The texture coding of the ROI is prior to the background area. SA-APBT and uniform quantization are adopted in texture coding. Compared with the color image coding algorithm based on shape-adaptive discrete cosine transform (SA-DCT) at the same bit rates, experimental results on test color images reveal that the objective quality and subjective effects of the reconstructed images using the proposed algorithm are better, especially at low bit rates. Moreover, the complexity of the proposed algorithm is reduced because of uniform quantization.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.10
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• pp.1104-1111
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• 2003

The paper presents an algorithm for the compensation of gain and phase imbalances to exist between I-phase and Q-phase signal at direct conversion receiver. We propose a gain and phase imbalances blind equalization compensation algorithm by using variable step-size adaptive loop at direct conversion receiver. The blind equalization schemes have trade-off between convergence speed and jitter effect for the compensation of gain and phase imbalance. We propose the variable step-size adaptive loop method, which varies the loop coefficients according to errors, for recovering these problem. By using variable step-size adaptive loops, we propose to speed up the convergence process and reduce the jitter effect and simulation results show that the algorithm compensates signal loss and speeds up convergence time.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.11a
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• pp.71-76
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• 2005

XML is rapidly becoming one of the most widely adopted technologies for information exchange and representation on the World Wide Web. However, the large part of data is still stored in a relational database. Hence, we need to convert relational data into XML documents. The most important point of the conversion is to reflect referential integrities In relational schema model to XML schema model exactly. Until now, FT, NeT and CoT are suggested as existing approaches for conversion from the relational schema model to the XML schema model but these approaches only reflect referential integrities which are defined explicitly for conversion. In this paper, we suggest an algorithm for automatic extraction of implicit referential integrities such as foreign key constraints which is not defined explicitly in the initial relational schema model. We present translated XML documents by existing algorithms and suggested algorithms as comparison evaluation. We also compare suggested algorithm and conventional algorithms by simluation in accuracy part.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.927-928
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• 2008

In this paper, a interpolation error concealment algorithm of motion compensated interpolated frame for motion compensated frame rate conversion to reduce the block artifacts caused by failure of conventional motion estimation based on block matching algorithm is proposed. Experimental results show good performance of the proposed scheme with significant reduction of the block artifacts.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.259-260
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• 2007

In this paper, a frame rate up-conversion algorithm using the motion vector frequency of neighboring blocks to reduce the block artifacts caused by failure of conventional motion estimation based on block matching algorithm is proposed. Experimental results show good performance of the proposed scheme with significant reduction of the erroneous motion vectors and block artifacts.

• Journal of Power Electronics
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• v.11 no.4
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• pp.464-470
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• 2011

In this paper, the feasibility of applying a position sensorless control technique to hybrid electric vehicles (HEVs) is practically evaluated. The proposed position estimator has a straightforward structure with properties that combines the model and the saliency tracking-based rotor position estimation for interior permanent magnet synchronous motors (IPMSMs). The proposed method can be used in the event of sensor loss or sensor recovery to sustain continuity of operations. The developed system takes into account the estimated position transition between two distinct sensorless methods. The transition is enhanced by introducing a synchronized transition algorithm based on a single tracking observer. Extensive experimental results are presented to verify the principles and show a reliable estimation performance over the entire speed range including standstill under 150% load conditions.

• Journal of Sensor Science and Technology
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• v.24 no.6
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• pp.359-363
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• 2015

This paper proposes an algorithm that reduces the conversion time of a single-slope A/D converter (SSADC) that has n-bit resolution, which typically is limited by conversion time taking up to $2^n$ clock cycles for an operation. To improve this situation, we have researched a novel hybrid-type A/D converter that consists of a pseudo-pipeline A/D converter and a conventional SSADC. The pseudo-pipeline A/D converter, using a single-stage of analog components, determines the most significant bits (MSBs) or upper bits and the conventional SSADC determines the remaining bits. Therefore, the modified SSADC, similar to the hybrid-type A/D converter, is able to significantly reduce the conversion time because the pseudo-pipeline A/D converter, which determines the MSBs (or upper bits), does not rely on a clock. The proposed A/D converter was designed using a $0.35-{\mu}m$ 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) technology process; additionally, its characteristics were simulated.

• Journal of Power Electronics
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• v.11 no.3
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• pp.360-368
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• 2011

This paper proposes an active frequency with a positive feedback in the d-q frame anti-islanding method suitable for a robust phase-locked loop (PLL) algorithm using the FFT concept. In general, PLL algorithms for grid-connected PV PCS use d-q transformation and controllers to make zero an imaginary part of the transformed voltage vector. In a real grid system, the grid voltage is not ideal. It may be unbalanced, noisy and have many harmonics. For these reasons, the d-q transformed components do not have a pure DC component. The controller tuning of a PLL algorithm is difficult. The proposed PLL algorithm using the FFT concept can use the strong noise cancelation characteristics of a FFT algorithm without a PI controller. Therefore, the proposed PLL algorithm has no gain-tuning of a PI controller, and it is hardly influenced by voltage drops, phase step changes and harmonics. Islanding prediction is a necessary feature of inverter-based photovoltaic (PV) systems in order to meet the stringent standard requirements for interconnection with an electrical grid. Both passive and active anti-islanding methods exist. Typically, active methods modify a given parameter, which also affects the shape and quality of the grid injected current. In this paper, the active anti-islanding algorithm for a grid-connected PV PCS uses positive feedback control in the d-q frame. The proposed PLL and anti-islanding algorithm are implemented for a 250kW PV PCS. This system has four DC/DC converters each with a 25kW power rating. This is only one-third of the total system power. The experimental results show that the proposed PLL, anti-islanding method and topology demonstrate good performance in a 250kW PV PCS.