Journal of Sensor Science and Technology (센서학회지)

The Korean Sensors Society (한국센서학회)
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Algorithm of Modified Single-slope A/D Converter with Improved Conversion Time for CMOS Image Sensor System

  • Lee, Sang-Hoon (School of Electronics Engineering, Kyungpook National Unversity) ;
  • Kim, Jin-Tae (School of Electronics Engineering, Kyungpook National Unversity) ;
  • Shin, Jang-Kyoo (College of IT Engineering, Kyungpook National Unversity) ;
  • Choi, Pyung (College of IT Engineering, Kyungpook National Unversity)
  • Received : 2015.10.29
  • Accepted : 2015.11.26
  • Published : 2015.11.30
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Abstract

This paper proposes an algorithm that reduces the conversion time of a single-slope A/D converter (SSADC) that has n-bit resolution, which typically is limited by conversion time taking up to $2^n$ clock cycles for an operation. To improve this situation, we have researched a novel hybrid-type A/D converter that consists of a pseudo-pipeline A/D converter and a conventional SSADC. The pseudo-pipeline A/D converter, using a single-stage of analog components, determines the most significant bits (MSBs) or upper bits and the conventional SSADC determines the remaining bits. Therefore, the modified SSADC, similar to the hybrid-type A/D converter, is able to significantly reduce the conversion time because the pseudo-pipeline A/D converter, which determines the MSBs (or upper bits), does not rely on a clock. The proposed A/D converter was designed using a $0.35-{\mu}m$ 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) technology process; additionally, its characteristics were simulated.

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References

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