• 제목/요약/키워드: concurrent engineering

검색결과 622건 처리시간 0.022초

복수 타입의 웨이퍼 혼류생산을 위한 클러스터 장비 로봇 운영 최적화 (Optimization for robot operations in cluster tools for concurrent manufacturing of multiple wafer types)

  • 유태선;이준호;고성길
    • 산업기술연구
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    • 제43권1호
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    • pp.49-55
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    • 2023
  • Cluster tools are extensively employed in various wafer fabrication processes within the semiconductor manufacturing industry, including photo lithography, etching, and chemical vapor deposition. Contemporary fabrication facilities encounter customer orders with technical specifications that are similar yet slightly varied. Consequently, modern fabrications concurrently manufacture two or three different wafer types using a cluster tool to maximize chamber utilization and streamline the flow of wafer lots between different process stages. In this review, we introduce two methods of concurrent processing of multiple wafer types: 1) concurrent processing of multiple wafer types with different job flows, 2) concurrent processing of multiple wafer types with identical job flows. We describe relevant research trends and achievements and discuss future research directions.

동시공학에 의한 Full Logic Deck Mechanism 개발 연구 (A study for the Development of the Full Logic Deck Mechanism using Concurrent Engineering for the shortening of Product Development Period)

  • 이해진;곽영만;박영현
    • 품질경영학회지
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    • 제29권3호
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    • pp.138-150
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    • 2001
  • Recently, industrial environments have been drastically changed. Customers require cheaper, better, stronger products more than ever. Thus companies have to satisfy the requirements of customers to be survived in this kind of industrial environments. To cope with these requirements from customers, engineers in industries must accept new paradigm and use some special tools for developing new product. This study has applied a Concurrent Engineering which would be good for shortening of product development period in developing of Full Logic Deck mechanism using in car audio. In this paper, a real case of systematic approach and successful story of Concurrent Engineering application in developing Full Logic Deck mechanism is illustrated.

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Concurrent topology optimization of composite macrostructure and microstructure under uncertain dynamic loads

  • Cai, Jinhu;Yang, Zhijie;Wang, Chunjie;Ding, Jianzhong
    • Structural Engineering and Mechanics
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    • 제81권3호
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    • pp.267-280
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    • 2022
  • Multiscale structure has attracted significant interest due to its high stiffness/strength to weight ratios and multifunctional performance. However, most of the existing concurrent topology optimization works are carried out under deterministic load conditions. Hence, this paper proposes a robust concurrent topology optimization method based on the bidirectional evolutionary structural optimization (BESO) method for the design of structures composed of periodic microstructures subjected to uncertain dynamic loads. The robust objective function is defined as the weighted sum of the mean and standard deviation of the module of dynamic structural compliance with constraints are imposed to both macro- and microscale structure volume fractions. The polynomial chaos expansion (PCE) method is used to quantify and propagate load uncertainty to evaluate the objective function. The effective properties of microstructure is evaluated by the numerical homogenization method. To release the computation burden, the decoupled sensitivity analysis method is proposed for microscale design variables. The proposed method is a non-intrusive method, and it can be conveniently extended to many topology optimization problems with other distributions. Several numerical examples are used to validate the effectiveness of the proposed robust concurrent topology optimization method.

A Process Algebra-Based Detection Model for Multithreaded Programs in Communication System

  • Wang, Tao;Shen, Limin;Ma, Chuan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제8권3호
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    • pp.965-983
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    • 2014
  • Concurrent behaviors of multithreaded programs cannot be described effectively by automata-based models. Thus, concurrent program intrusion attempts cannot be detected. To address this problem, we proposed the process algebra-based detection model for multithreaded programs (PADMP). We generate process expressions by static binary code analysis. We then add concurrency operators to process expressions and propose a model construction algorithm based on process algebra. We also present a definition of process equivalence and behavior detection rules. Experiments demonstrate that the proposed method can accurately detect errors in multithreaded programs and has linear space-time complexity. The proposed method provides effective support for concurrent behavior modeling and detection.

프로세스 분석을 위한 IDEF3 모델을 CPM Network 모델로 변환하기 위한 절차 (Procedures of Transform IDEF3 Model into CPM Precedence Network Model for Process Analysis)

  • 강동진;김경표;이상용;정용식
    • 한국산업정보학회:학술대회논문집
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    • 한국산업정보학회 1999년도 춘계학술대회 발표논문집
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    • pp.135-144
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    • 1999
  • A major concern in Concurrent Engineering is the control and management of workload in a period of process. As a general rule, leveling the peak of workload in a certain period is difficult because concurrent processing is comprised of various processes, including overlapping, paralleling and looping. Therefore, workload management with resource constraints is so beneficial that effective methods to analyze design process This study presents a procedure to transform the IDEF3 process model into the precedence logic network model for more useful assessment of the process. This approach is expected to facilitate resolving resource constrained scheduling problems more systematically in Concurrent Engineering environment.

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Robust concurrent topology optimization of multiscale structure under load position uncertainty

  • Cai, Jinhu;Wang, Chunjie
    • Structural Engineering and Mechanics
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    • 제76권4호
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    • pp.529-540
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    • 2020
  • Concurrent topology optimization of macrostructure and microstructure has attracted significant interest due to its high structural performance. However, most of the existing works are carried out under deterministic conditions, the obtained design may be vulnerable or even cause catastrophic failure when the load position exists uncertainty. Therefore, it is necessary to take load position uncertainty into consideration in structural design. This paper presents a computational method for robust concurrent topology optimization with consideration of load position uncertainty. The weighted sum of the mean and standard deviation of the structural compliance is defined as the objective function with constraints are imposed to both macro- and micro-scale structure volume fractions. The Bivariate Dimension Reduction method and Gauss-type quadrature (BDRGQ) are used to quantify and propagate load uncertainty to calculate the objective function. The effective properties of microstructure are evaluated by the numerical homogenization method. To release the computation burden, the decoupled sensitivity analysis method is proposed for microscale design variables. The bi-directional evolutionary structural optimization (BESO) method is used to obtain the black-and-white designs. Several 2D and 3D examples are presented to validate the effectiveness of the proposed robust concurrent topology optimization method.

다중 도약 무선망의 간섭 환경에서 다이버시티 수신을 이용한 증폭 전달 중계기의 성능 분석 (Performance Analysis of Interference due to Concurrent Transmission in Amplifying and Forward Relay with Diversity Reception)

  • 임성묵;김동규;왕한호;김영주;남상호;홍대식
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.145-146
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    • 2006
  • In this paper, when concurrent transmission and diversity reception at each relay are assumed to increase bandwidth efficiency in linear multihop system, we analyze interference due to concurrent transmission and verify it. In the interference-free environment, more diversity sources at each relay result in better performance [1][2]. However, interference degrades BER performance because accumulated and propagated interference power surpasses original data power. Therefore, if we use the result of this paper, we can make bandwidth efficiency increase as well as BER performance good in linear multihop system by considering concurrent transmission with reuse factor and developing the algorithm which determines the number of diversity source.

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CHILL 언어의 병행처리를 위한 Run-time 지원 시스템의 설계 및 구현 (A Design and Implementation of Run-time Support System for Concurrent Processing of the CHILL)

  • 하수철;조철회
    • 한국정보처리학회논문지
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    • 제6권7호
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    • pp.1941-1954
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    • 1999
  • 본 논문은 ITU-T 통신 처리 시스템용 프로그래밍 언어 CHILL에서 제공되는 병행처리 기능을 적용하기 위한 CHILL 실행시간 지원 시스템(CRS : CHILL Run-time support System)의 설계 및 구현에 관한 연구이다. CHILL은 다른 병행 프로그래밍 언어에 비해 다양한 병행처리 기능들을 제공하고 있기 때문에, CRS의 설계는 병행처리 기능의 인터페이스 규격을 설계한다. CHILL의 병행처리 프리미티브는 프로시듀어 호출 형식으로 사용하도록 라이브러리 방식을 사용하며, CHILL 프로세스의 실행을 병행적으로 제어하기 위해 CHILL 프로그램 구동 루팀 및 문맥 교환부와 CHILL 프로세스 제어부를 구현한다.

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교랑 공사에 동시공학 적용을 위한 체크리스트 도출 (Checklist for the application of concurrent engineering in bridge construction)

  • 박세만;박태일;김형관
    • 한국건설관리학회논문집
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    • 제14권1호
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    • pp.3-11
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    • 2013
  • 건설프로젝트가 대형화, 복합화, 그리고 장기화됨에 따라, 혁신적인 신공법의 개발과 건설 프로세스의 첨단화에 대한 건설 시장의 요구도 지속적으로 증가하고 있다. 이에 건설 분야에서는, 빠른 상품 개발과 품질향상을 위하여 산업분야에서 널리 쓰였던 동시공학의 건설프로젝트 적용을 고려하게 되었다. 하지만 동시공학의 개념들은 선진화된 관리시스템의 부재 및 개념의 학술적 정립 미비로 인하여, 실제 건설 현장에 충분히 활용되지 못하였다. 이에 본 연구는 대표적인 장기, 대형 프로젝트인 교량공사를 대상으로 성공적인 동시공학 적용을 위한 체크리스트를 도출하였다. 국내 건설 분야에 동시공학 실제 적용 사례와 문헌고찰을 통해 일차적으로 동시공학의 건설 산업적용을 위한 체크리스트를 도출한 뒤, 교량전문가 인터뷰를 바탕으로 이전 단계에 도출된 체크리스트를 교량공사의 특성에 맞게 수정하고 발전시켜 교량공사에 성공적인 동시공학 적용을 위한 체크리스트를 확정하였다. 또한 188 명의 관련 업무 수행자들의 설문조사를 바탕으로 체크리스트의 유용성을 검증하고 중요도 실행도 분석으로 우선적인 관리가 요구되는 필수요소를 확인하였다. 본 연구를 통하여 도출된 체크리스트는 교량건설 프로젝트의 진행에 있어 체계적인 사전검토와 건설 단계별 프로세스의 종합적 분석을 가능케 하여, 동시공학의 실무 활용성을 증대시킨다는 점에서 그 의의가 높다고 판단된다.