• 제목/요약/키워드: computer design

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Development of the Unified Database Design Methodology for Big Data Applications - based on MongoDB -

  • Lee, Junho;Joo, Kyungsoo
    • Journal of the Korea Society of Computer and Information
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    • v.23 no.3
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    • pp.41-48
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    • 2018
  • The recent sudden increase of big data has characteristics such as continuous generation of data, large amount, and unstructured format. The existing relational database technologies are inadequate to handle such big data due to the limited processing speed and the significant storage expansion cost. Current implemented solutions are mainly based on relational database that are no longer adapted to these data volume. NoSQL solutions allow us to consider new approaches for data warehousing, especially from the multidimensional data management point of view. In this paper, we develop and propose the integrated design methodology based on MongoDB for big data applications. The proposed methodology is more scalable than the existing methodology, so it is easy to handle big data.

An Effective Experimental Optimization Method for Wireless Power Transfer System Design Using Frequency Domain Measurement

  • Jeong, Sangyeong;Kim, Mina;Jung, Jee-Hoon;Kim, Jingook
    • Journal of electromagnetic engineering and science
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    • v.17 no.4
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    • pp.208-220
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    • 2017
  • This paper proposes an experimental optimization method for a wireless power transfer (WPT) system. The power transfer characteristics of a WPT system with arbitrary loads and various types of coupling and compensation networks can be extracted by frequency domain measurements. The various performance parameters of the WPT system, such as input real/imaginary/apparent power, power factor, efficiency, output power and voltage gain, can be accurately extracted in a frequency domain by a single passive measurement. Subsequently, the design parameters can be efficiently tuned by separating the overall design steps into two parts. The extracted performance parameters of the WPT system were validated with time-domain experiments.

A Probe Design Method for DNA Microarrays Using ${\epsilon}$-Multiobjetive Evolutionary Algorithms (${\epsilon}$-다중목적 진화연산을 이용한 DNA Microarray Probe 설계)

  • Cho Young-Min;Shin Soo-Yong;Lee In-Hee;Zhang Byoung-Tak
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.06a
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    • pp.82-84
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    • 2006
  • 최근의 생물학적인 연구에 DNA microarray가 널리 쓰이고 있기 때문에, 이러한 DNA microarray를 구성하는데 필요한 probe design 작업의 중요성이 점차 커져가고 있다. 이 논문에서는 probe design 문제를 thermodynamic fitness function이 2개인 multi-objective optimization 작업으로 변환한 뒤, ${\epsilon}$-multiobjective evolutionary algorithm을 이용하여 probe set을 찾는다. 또한, probe 탐색공간의 크기를 줄이기 위하여 각 DNA sequence의 primer 영역을 찾는 작업을 진행하며, 사용자가 직접 프로그램을 테스트할 수 있는 웹사이트를 제공한다. 실험 대상으로는 mycoides를 선택하였으며, 이 논문에서 제안된 방법을 사용하여 성공적으로 probe set을 발견할 수 있었다.

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Design of CP Antenna with a Fenced Ground for a Handheld RFID Reader

  • Hong, Seok-Jin;Yu, Yeon-Sik;Lee, Dong-Hyun;Kahng, Sung-Tek;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.7 no.2
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    • pp.96-101
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    • 2007
  • A design of circular polarized(CP) microstrip antenna with a fenced ground is proposed and the equivalent circuit is derived. The antenna consists of a square radiating patch with a pair of truncated comers, a bottom ground and a fenced ground. From conducted experiments, a patch size reduction using the metal fence as large as 25% from the conventional patch structure, has been obtained. The input admittance of the extracted equivalent circuit is shown to agree with that of the measurement. And the design parameters and performance of the proposed antenna are examined by analyzing the fields and circuit behaviors.

Effective Estimation Method of Routing Congestion at Floorplan Stage for 3D ICs

  • Ahn, Byung-Gyu;Kim, Jae-Hwan;Li, Wenrui;Chong, Jong-Wha
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.344-350
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    • 2011
  • Higher integrated density in 3D ICs also brings the difficulties of routing, which can cause the routing failure or re-design from beginning. Hence, precise congestion estimation at the early physical design stage such as floorplan is beneficial to reduce the total design time cost. In this paper, an effective estimation method of routing congestion is proposed for 3D ICs at floorplan stage. This method uses synthesized virtual signal nets, power/ground network and clock network to achieve the estimation. During the synthesis, the TSV location is also under consideration. The experiments indicate that our proposed method had small difference with the estimation result got at the post-placement stage. Furthermore, the comparison of congestion maps obtained with our method and global router demonstrates that our estimation method is able to predict the congestion hot spots accurately.

Design & Implementation of Enhanced Groupware Messenger

  • Park, HyungSoo;Kim, HoonKi;Na, WooJong
    • Journal of the Korea Society of Computer and Information
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    • v.23 no.4
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    • pp.81-88
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    • 2018
  • In this paper, we present some problems with the Groupware Messenger functionality based on dot net 2.0 and implement a new design structure to solve them. They include memory leakage, slow processing, and client window memory crash. These problems resulted in the inconvenience of using instant messaging and the inefficient handling of office tasks. Therefore, in this paper, instant messaging functionality is implemented according to a new design architecture. The new system upgrades dot net 4.5 for clients and deploys the new features based on MQTT for the messenger server. We verify that the memory leak problem and client window memory crash issues have been eliminated on the system with the new messenger functionality. We measure the amount of time it takes to bind data to a set of messages and evaluate the performance, compared to a given system. Through this comparative evaluation, we can see that the new system is more reliable and performing.

A Design Marketing System using Social Big-Data (소셜 빅데이터를 이용한 디자인 마케팅 시스템)

  • Jeon, Jin-Hwan;Song, Jeo;Yoon, Yeo-Been;Lee, Sang-Moon
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2016.01a
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    • pp.213-214
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    • 2016
  • 디자인경영과 서비스디자인 등은 전 산업분야에 걸쳐 이슈가 되고 있으며, 기업의 경쟁력으로서 중요한 요소가 되고 있다. 산업디자인 분야는 제품디자인, 시각디자인, 포장디자인 등으로 분류될 수 있다. 각 분야의 공통점은 제품의 생산부터 유통까지 연계되어 관리되어 지며, 최근에는 저작권, 사회적책임, 시장영향력에 대한 부가적인 업무가 요구되고 있다는 점이다. 본 논문에서는 산업디자인과 관련한 이미지와 오피니언에 기반한 빅데이터를 이용하여 디자인 공급자와 수요자 간의 컨설팅, 디자인제작, 유통, 후속조치 등이 통합적으로 관리될 수 있는 시스템을 제안한다.

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Parametric Studies for the Optimum Design of a Hexagonal Plate Monopole Antenna

  • Park Seong-Bae;Park Joung-Min;Ahn Bierng-Chearl;Kim Kyung-Seok
    • Journal of electromagnetic engineering and science
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    • v.6 no.1
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    • pp.53-61
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    • 2006
  • In this paper, we present parametric studies for the optimum design of a hexagonal plate monopole antenna. The dependence of the antenna performance on various geometric parameters is investigated using a commercial electromagnetic software, from which an optimum design of a hexagonal plate monopole antenna is derived. Guidelines for determining initial parameter values are given. The diameter of the circular ground plane is minimized tlo 1/5 wavelength at the lowest operating frequency. The antenna impedance matching is controlled by adjusting the gap between the plate and the ground plane, the plate base width, and the base bevel angle. The antenna proposed in. this paper shows a reflection coefficient less than -10 dB and a $2.0{\sim}6.2$ dBi gain over $3{\sim}20$ GHz frequencies.

Linearized Transistor Model Based Automated Biasing Scheme for Analog Integrated Circuits

  • Lacek, Matthew;Nahra, Daniel;Roter, Ben;Lee, Kye-Shin
    • Journal of Multimedia Information System
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    • v.8 no.2
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    • pp.143-146
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    • 2021
  • This work presents an automated transistor biasing scheme for analog integrated circuits. In order to effectively bias the transistor at a desired operating point, the proposed method uses a linearized transistor circuit model along with the curve fitted expressions obtained from the pre-simulated I-V characteristics of the actual transistor. As a result, the transistor size that leads to the desired operating point can be easily determined without heavily relying on the circuit simulator, which will lead to significant design time reduction. Furthermore, the proposed method is applied to an actual amplifier circuit where the design time based on the proposed biasing method showed 10× faster than the conventional design approach using the circuit simulator.

Design and Control Method of ZVT Interleaved Bidirectional LDC for Mild-Hybrid Electric Vehicle

  • Lee, Soon-Ryung;Lee, Jong-Young;Jung, Won-Sang;Won, Il-Kwon;Bae, Joung-Hwan;Won, Chung-Yuen
    • Journal of Electrical Engineering and Technology
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    • v.13 no.1
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    • pp.226-239
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    • 2018
  • In this paper, design and control method ZVT Interleaved Bidirectional LDC(IB-LDC) for mild-hybrid electric vehicle is proposed. The IB-LDC is composed of interleaved buck and boost converters employing an auxiliary inductor and auxiliary capacitors to achieve zero-voltage-transition. Operating principle of IB-LDC according to operation mode is introduced and mathematically analyzed in buck and boost mode. Moreover, PFM and phase control are proposed to reduce circulating current for low power range. Passive components design such as main inductor, auxiliary inductor and capacitors is suggested, considering ZVT condition and maximizing efficiency. Furthermore, a 600W prototype of ZVT IB-LDC for MHEVs is built and tested to verify validity.