• Title/Summary/Keyword: compensation scheme

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Transform domain Wyner-Ziv Coding based on the frequency-adaptive channel noise modeling (주파수 적응 채널 잡음 모델링에 기반한 변환영역 Wyner-Ziv 부호화 방법)

  • Kim, Byung-Hee;Ko, Bong-Hyuck;Jeon, Byeung-Woo
    • Journal of Broadcast Engineering
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    • v.14 no.2
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    • pp.144-153
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    • 2009
  • Recently, as the necessity of a light-weighted video encoding technique has been rising for applications such as UCC(User Created Contents) or Multiview Video, Distributed Video Coding(DVC) where a decoder, not an encoder, performs the motion estimation/compensation taking most of computational complexity has been vigorously investigated. Wyner-Ziv coding reconstructs an image by eliminating the noise on side information which is decoder-side prediction of original image using channel code. Generally the side information of Wyner-Ziv coding is generated by using frame interpolation between key frames. The channel code such as Turbo code or LDPC code which shows a performance close to the Shannon's limit is employed. The noise model of Wyner-Ziv coding for channel decoding is called Virtual Channel Noise and is generally modeled by Laplacian or Gaussian distribution. In this paper, we propose a Wyner-Ziv coding method based on the frequency-adaptive channel noise modeling in transform domain. The experimental results with various sequences prove that the proposed method makes the channel noise model more accurate compared to the conventional scheme, resulting in improvement of the rate-distortion performance by up to 0.52dB.

One-Chip Multi-Output SMPS using a Shared Digital Controller and Pseudo Relaxation Oscillating Technique (디지털 컨트롤러 공유 및 Pseudo Relaxation Oscillating 기법을 이용한 원-칩 다중출력 SMPS)

  • Park, Young-Kyun;Lim, Ji-Hoon;Wee, Jae-Kyung;Lee, Yong-Keun;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.148-156
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    • 2013
  • This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.

Analysis of MPEG-4 Encoder for Object-based Video (실시간 객체기반 비디오 서비스를 위한 MPEG-4 Encoder 분석)

  • Kim Min Hoon;Jang Euee Seon;Lee Sun young;Moon Seok ju
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.1
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    • pp.13-20
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    • 2004
  • In this paper, we have analyzed the current MPEG-4 video encoding tools and proposed efcient coding techniques that reduce the complexity of the encoder. Until recently, encoder optimization without shape coding has been a major concern in video for wire/wireless low bit rate coding services. Recently, we found out that the computational complexity of MPEG-4 shape coding plays a very important role in the object-based coding through experiments. We have made an experiment whether we could get optimized object-based coding method through successfully combining latest optimized texture coding techniques with our proposed optimized shape coding techniques. In texture coding, we applied the MVFAST method for motion estimation. We chose not to use IVOPF(Intelligent VOP Formation) but to use TRB(Tightest Rectangular Boundary) for positioning VOP and, finally, to eliminate the spiral search of shape motion estimation to reduce the complexity in shape coding. As a result of experiment, our proposed scheme achieved improved time complexity over the existing reference software by $57.3\%$ and over the optimized method on which only shape coding was applied by $48.7\%$, respectively.

Implementation of the BLDC Motor Drive System using PFC converter and DTC (PFC 컨버터와 DTC를 이용한 BLDC 모터의 구동 시스템 구현)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.5
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    • pp.62-70
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    • 2007
  • In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.

A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.72-77
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    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

The Profitability Analysis of BESS Installation with PV Generation under RPS (RPS 제도 하에서의 태양광발전 연계형 배터리시스템 수익분석 방법에 관한 연구)

  • Kim, Chang-Soo;Yoo, Tae-Hyun;Rhee, Chang-Ho
    • Journal of Energy Engineering
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    • v.26 no.4
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    • pp.107-117
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    • 2017
  • Since South Korea started to apply Renewable Portfolio Standard (RPS) in 2012, there have been huge investment for deploying renewable technologies. Recently, the government determined to incentivize battery energy storage system(BESS) with renewable generations in order to induce the improvement of dispatching capability. In this paper, the annual pattern of PV generation based on actual generation data in South Korea is analyzed and the duration curve of capacity factor is proposed in order to provide the simplified analyzing methodology of present support policy for additional BESS installation for decision maker who is responsible for supply and demand planning. With suggested methodology, the range of appropriate BESS size with respect to the variation of system marginal price(SMP) and renewable energy certificate(REC) price can be derived briefly, and decision makers easily evaluate the effect of support scheme. Current policy for BESS installation support present additional BESS-related installation policy may give incentives to developers partially, however, the dependence between BESS size and benefit components (SMP and REC) can limit the deployment of the various portfolios of the BESS. Therefore, when improving the current policy in future, addressing the dependence between the technical aspects of battery size and the benefit components separately by the technical and economical parts is needed to set the suitable compensation rules for the renewable generation and BESS.

Fixed Pattern Noise Reduction in Infrared Videos Based on Joint Correction of Gain and Offset (적외선 비디오에서 Gain과 Offset 결합 보정을 통한 고정패턴잡음 제거기법)

  • Kim, Seong-Min;Bae, Yoon-Sung;Jang, Jae-Ho;Ra, Jong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.49 no.2
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    • pp.35-44
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    • 2012
  • Most recent infrared (IR) sensors have a focal-plane array (FPA) structure. Spatial non-uniformity of a FPA structure, however, introduces unwanted fixed pattern noise (FPN) to images. This non-uniformity correction (NUC) of a FPA can be categorized into target-based and scene-based approaches. In a target-based approach, FPN can be separated by using a uniform target such as a black body. Since the detector response randomly drifts along the time axis, however, several scene-based algorithms on the basis of a video sequence have been proposed. Among those algorithms, the state-of-the-art one based on Kalman filter uses one-directional warping for motion compensation and only compensates for offset non-uniformity of IR camera detectors. The system model using one-directional warping cannot correct the boundary region where a new scene is being introduced in the next video frame. Furthermore, offset-only correction approaches may not completely remove the FPN in images if it is considerably affected by gain non-uniformity. Therefore, for FPN reduction in IR videos, we propose a joint correction algorithm of gain and offset based on bi-directional warping. Experiment results using simulated and real IR videos show that the proposed scheme can provide better performance compared with the state-of-the art in FPN reduction.

Cache Invalidation Schemes based on Time Guarantee for Improving Access Time in Mobile Ad hoc Networks (모바일 애드혹 네트워크에서 캐쉬 접근 시간 향상을 위한 시간보증 기반의 캐쉬무효화 기법)

  • Choi, Jae-Ho;Oh, Jae-Oh;Lee, Myong-Soo;Lee, Sang-Keun
    • The KIPS Transactions:PartC
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    • v.16C no.1
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    • pp.65-72
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    • 2009
  • Due to the popularity of mobile devices and advances in wireless communication technologies, a mobile ad hoc network has received a lot of attention. In the existing data replication management research, the use of a replica has been shown to be an efficient technique for improving data accessibility. However, to use a replica in ad hoc networks, the data consistency between the original data and the replica should be guaranteed. In the traditional research, a mobile node should check an original data whether the data is updated or not. However, It may be costly or sometimes impossible to check the original data. In the case of the time constraint applications, the checking cost can cause more serious problem. In this paper, we propose the time-guarantee based cache invalidation schemes for time constraint applications and the threshold based compensation method to enhance the time-guarantee based scheme. The proposed schemes can remove the "rollback" problem. Simulation results show that our schemes outperform the previous ones in terms of access time with little loss of data currency.

Lightweight video coding using spatial correlation and symbol-level error-correction channel code (공간적 유사성과 심볼단위 오류정정 채널 코드를 이용한 경량화 비디오 부호화 방법)

  • Ko, Bong-Hyuck;Shim, Hiuk-Jae;Jeon, Byeung-Woo
    • Journal of Broadcast Engineering
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    • v.13 no.2
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    • pp.188-199
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    • 2008
  • In conventional video coding, encoder complexity is much higher than that of decoder. However, investigations for lightweight encoder to eliminate motion prediction/compensation claiming most complexity in encoder have recently become an important issue. The Wyner-Ziv coding is one of the representative schemes for the problem and, in this scheme, since encoder generates only parity bits of a current frame without performing any type of processes extracting correlation information between frames, it has an extremely simple structure compared to conventional coding techniques. However, in Wyner-Ziv coding, channel decoding errors occur when noisy side information is used in channel decoding process. These channel decoding errors appear more frequently, especially, when there is not enough correlation between frames to generate accurate side information and, as a result, those errors look like Salt & Pepper type noise in the reconstructed frame. Since this noise severely deteriorates subjective video quality even though such noise rarely occurs, previously we proposed a computationally extremely light encoding method based on selective median filter that corrects such noise using spatial correlation of a frame. However, in the previous method, there is a problem that loss of texture from filtering may exceed gain from error correction by the filter for video sequences having complex torture. Therefore, in this paper, we propose an improved lightweight encoding method that minimizes loss of texture detail from filtering by allowing information of texture and that of noise in side information to be utilized by the selective median filter. Our experiments have verified average PSNR gain of up to 0.84dB compared to the previous method.

FMEA of Electric Power Management System for Digital Twin Technology Development of Electric Propulsion Vessels (전기추진선박 디지털트윈 기술개발을 위한 전력관리시스템 FMEA)

  • Yoon, Kyoungkuk;Kim, Jongsu
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.27 no.7
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    • pp.1098-1105
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    • 2021
  • The International Maritime Organization has steadily strengthened environmental regulations on nitrogen oxides and carbon dioxide emitted from marine vessels. Consequently, the demand for electric propulsion vessels based on eco-friendly elements has increased. To this end, research and development has been steadily conducted for various vessels. In electric propulsion systems, a redundancy configuration is typically adopted to increase reliability and facilitate the onboard arrangement. Furthermore, studies have been actively conducted to ensure the safety of electric propulsion systems through the combination with digital twin technology. A digital twin can be used to predict outcomes in advance by implementing real-world equipment or space in a virtual world like twins, integrating real-world information and data with the virtual world, and performing computer simulations of situations that can occur in a real environment. In this study, we perform failure modes and effects analysis (FMEA) to validate the electric power management system (PMS) redundancy scheme for the digital twin technology development of electric propulsion vessels. Then, we propose the role and algorithm of PMS as a compensation function for preventing primary and secondary damages caused by a single equipment failure of the PMS and preventing additional damages by analyzing the impact on the entire system under real vessel operating conditions based on the redundancy FMEA suggested for the ship classification and certification. We verified the improvement in propulsion conservation through tests.