• 제목/요약/키워드: comparator method

검색결과 112건 처리시간 0.025초

최적의 히스테리시스 밴드 크기를 이용한 유도전동기의 직접토크제어 (Direct Torque Control of Induction Motor Using Optimal Hysteresis Band Amplitude)

  • 정병호;신사현;임병옥;이강연;조금배;백형래
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 B
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    • pp.1208-1210
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    • 2003
  • Most of all, DTC drive is very simple in its implementation because it needs only two hysteresis comparator and switching vector table for both flux and torque control. The amplitude of hysteresis band greatly influences on the drive performance such as flux and torque ripple and inverter switching frequency. In this paper the influence of the amplitudes of flux and torque hysteresis bands and sampling time of control program on the torque and flux ripples are investigated. Simulation results confirm the superiority of the DTC under the proposed method over the conventional DTC.

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A Study on the Characterization on Some Semiconuctor Materials by Neutron Activation Analysis. Characterization of Semiconductor Silicon

  • 이철;권오천;김호근;이종두;정구순
    • Bulletin of the Korean Chemical Society
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    • 제10권1호
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    • pp.30-32
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    • 1989
  • Traces of nine elements, gold, arsenic, cobalt, chromium, copper, europium, hafnium, sodium and antimony in commercially available silicon crystals were determined by the instrumental neutron activation analysis using the single comparator method. The values of the concentrations of these elements in both single and polycrystals were found to decrease significantly to a low limiting level by simply washing and etching surface contaminants having been introduced during various steps of sample preparation and irradiation. However, the chromium levels in polycrystals were not easily decreased, these depending upon the cutting tools employed. The Sb-doped content in each semiconductor has been compared with the associated quantities such as the concentration and the conductivity range given by the sample donor. Uncertainty in the sodium analysis due to the fission neutron reaction by silicon itself was discussed.

Research of the adaptive control on modulation factor for PSR fly-back PSM converter

  • Tian, Lei;Li, Qinqin;Wang, Weiheng
    • ETRI Journal
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    • 제41권1호
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    • pp.124-132
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    • 2019
  • The energy balance (EB) model of a primary side regulation (PSR) fly-back converter in the discontinuous conduction mode (DCM) is discussed in this paper. Based on this EB model, the stability of a PSR fly-back converter in the pulse skipping mode (PSM) is analyzed, and a self-adapting modulation factor control strategy is proposed. Theoretical analysis and simulation results show that by saving an optocoupler and correlative circuits, which are necessary in traditional PSM fly-back converters, the modulation factor tolerance controlled by this method is 1.26% on average, corresponding to the ideal value. Compared with traditional fly-back PSM controllers, the power saved in the sampler/comparator modules is 87% on average for a load range of $1{\Omega}$ to $1k{\Omega}$.

수평원관속에 동심으로 놓여있는 얼음 봉의 융해현상에 관한 보험적 연구 (An Experimental Study on the Melting of Horizontal Ice - Bar Located Concentrically in the Cylinder)

  • 이동욱;유상신
    • 대한설비공학회지:설비저널
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    • 제15권2호
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    • pp.196-203
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    • 1986
  • The melting phenomena of horizontal cylindrical ice-bar immersed in water and air concentrically in the cylinder are experimentally investigated for the temperature range from $3.5^{\circ}C\;to\;2.5^{\circ}C$. The shapes of the melting ice-bar are recorded photographically by the shadowgraph method. The shadowgraphs of the melting ice-bar show that water adjacent to the bar flows upward for the temperature range from $3.5^{\circ}C\;to\;5.8^{\circ}C$ while above $5.8^|\circ}C$ the flow is downward direction. The local and average Nusselt numbers are obtoined with the recorded shadowgraphs and comparator. Melting shapes of the ice-bar in the air show the vortex motion in the bottom portion of the bar, whereas no vortex motion appears in the bottom portion when the bar is melted in the water.

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Digital Tuning Analog Component 집적회로의 설계 및 제작 (Design and Fabrication of Digital Tuning Analog Component IC)

  • 신명철;장영욱;김영생;고진수
    • 대한전자공학회논문지
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    • 제23권6호
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    • pp.923-928
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    • 1986
  • This paper describes the design and fabrication of a high performance digital tuning analog component integrated circuit that contains a television station detector and decoders(H and L types). When the comparator level sampling method is used, this integrated circuit can be used as a stable channel selector for an external circuit with very large signal variation. It has been fabricated using the SST bipolar standard process and its chip size is 2.2x2.1mm\ulcorner As a result, we have succeeded in fabricating the IC that satisfies the D.C characteristics, and the channel station detector and decoder function.

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디지털 위상 고정 루프를 이용한 계전기용 정밀 주파수 측정 장치 (Design of the Power System Frequency Measurement Module for the Relay using the Digital Phase Locked-Loop)

  • 윤영석;최일흥;이상윤;황동환;이상정;박장수
    • 대한전기학회논문지:전력기술부문A
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    • 제53권7호
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    • pp.365-374
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    • 2004
  • The relay measures the frequency of the power system in order to detect faults and separate them from the system. Many estimation algorithms for the relay have been proposed to accurately measure the frequency. This paper proposes a new frequency measurement method using the digital phase locked-loop(DPLL) for the relay of the power system. The proposed method is configured with a DPLL scheme and verified through computer simulations and experimental tests. In order to cope with noises in the power system, filters are included in the input signal processing part and the frequency comparator. MATLAB is used for computer simulations and an experimental setup with a CPU and an FPGA(Field Programmable Gate Array) is constructed. The loop filter of the DPLL is run in the CPU software In adjust parameters and others are in the FPGA. Experimental tests are performed lot a function generator and the power system. Results show that the proposed method is appropriate to the frequency measurement for the relay.

전류변성기의 비오차와 위상오차의 절대 평가 기술 (Absolute Evaluation Method to Obtain Ratio Error and Phase Displacement of Current Transformers)

  • 김윤형;정재갑;한상길;구경완;한상옥
    • 전기학회논문지P
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    • 제57권2호
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    • pp.153-159
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    • 2008
  • We have developed an absolute evaluation method to obtain the ratio error and phase displacement of a current transformer (CT) without any precise standard CT by measuring four parameters in a CT equivalent circuit. The excitation admittance in the CT equivalent circuit can be obtained by employing standard resistors with negligible reactive component. The secondary leakage impedance in the CT equivalent circuit can be measured using a universal impedance bridge. The method was applied to CTs under test with the wide current ratios in the range of 5 A / 5 A - 5,000 A / 5 A and 5 A / 1 A - 5,000 A / 1 A. The ratio error and phase displacement of the CT under test obtained in this study are consistent with those measured at the national institute in Canada using the same CT under test within an expanded uncertainty (k = 2) in the overall current ratios.

Novel Architecture for Efficient Implementation of Dimmable VPPM in VLC Lightings

  • Jeong, Jin-Doo;Lim, Sang-Kyu;Jang, Il-Soon;Kim, Myung-Soon;Kang, Tae-Gyu;Chong, Jong-Wha
    • ETRI Journal
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    • 제36권6호
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    • pp.905-912
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    • 2014
  • In this paper, a new architecture is proposed to achieve complexity efficiency in implementing variable pulse position modulation (VPPM). VPPM, specified in IEEE 802.15.7, can support wireless communication and dimming control simultaneously using visible light. The proposed architecture is based on the VPPM signal property in which the transition point of the modulated output is obtained by counting the sample index and comparing it to both the assigned dimming factor and the transmitting data. Therefore, the proposed architecture can be composed of simple logics, including a counter, a comparator, and an inverter, all of which are insensitive to the dimming resolution in contrast to a conventional codeword-table method. This paper describes the verification of the proposed algorithm through a register-transfer level implementation of the codeword and proposed architectures. In comparison with the codeword-table method, the proposed method gains a nine-fold complexity reduction at a 1% dimming-step resolution.

PFC용 부스트 컨버터의 효율 개선에 관한 연구 (A Study on the Efficiency Improvement of Boost Converter for Power Factor Correction)

  • 전내석;전수균;이성근;길경석;김윤식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 하계학술대회 논문집 B
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    • pp.1094-1096
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    • 2002
  • A new technique for improving the efficiency of single-phase high-frequency boost converter is proposed. This converter includes an additional low-frequency boost converter which is connected to the main high-frequency switching device in parallel. The additional converter is controlled at lower frequency. Most of the current flows in the low-frequency switch and so, high-frequency switching loss is greatly reduced accordingly. Both switching device are controlled by a simple method; each controller consists of a comparator, a frequency generator and an error amplifier. The converter works cooperatively in high efficiency and acts as if it were a conventional high-frequency boost converter with one switching device, The proposed method is verified by simulation and experiment. This paper describes the converter configuration and design, and discusses the steady-state performance concerning the switching loss reduction and efficiency improvement.

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SAW용 고속 타이머 구현에 대한 연구 (A Study on the Implementation of the High Speed Timer for SAW Device)

  • 김옥수;김영길
    • 한국정보통신학회논문지
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    • 제13권5호
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    • pp.1030-1037
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    • 2009
  • 현재 SAW 센서는 많은 발전을 해왔고 온도나 압력용 SAW 센서를 저전력, 고속 신호 처리로 하기 위해서는 TDS(Time Domain Sampling) 방식을 이용한 리더기 플랫폼이 필요하다. 이러한 리더기를 제작하기 위해서는 SAW 센서의 표준 응답신호와의 변화된 응답시간과의 짧은 시간차를 측정하기 위해 고속의 타이머가 필요하게 된다. 여기서 제안하는 플랫폼은 SAW 센서에 신호를 받아서 비교기로 아날로그 신호를 디지털 신호로 전환하여 그 전환된 신호를 타이머 모듈에서 읽어 들여 신호들의 시간차를 측정하여 표시하여 나노초(Nano Second) 단위의 시간을 측정하는 방법을 제안 하고자 한다.