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Design of the Power System Frequency Measurement Module for the Relay using the Digital Phase Locked-Loop  

윤영석 (삼성전지(주))
최일흥 ((주)네비)
이상윤 (충남대학교 전자공학)
황동환 (충남대학교 전기정보통신공학)
이상정 (충남대학교 전기정보통신공학)
박장수 (LG산전(주))
Publication Information
The Transactions of the Korean Institute of Electrical Engineers A / v.53, no.7, 2004 , pp. 365-374 More about this Journal
Abstract
The relay measures the frequency of the power system in order to detect faults and separate them from the system. Many estimation algorithms for the relay have been proposed to accurately measure the frequency. This paper proposes a new frequency measurement method using the digital phase locked-loop(DPLL) for the relay of the power system. The proposed method is configured with a DPLL scheme and verified through computer simulations and experimental tests. In order to cope with noises in the power system, filters are included in the input signal processing part and the frequency comparator. MATLAB is used for computer simulations and an experimental setup with a CPU and an FPGA(Field Programmable Gate Array) is constructed. The loop filter of the DPLL is run in the CPU software In adjust parameters and others are in the FPGA. Experimental tests are performed lot a function generator and the power system. Results show that the proposed method is appropriate to the frequency measurement for the relay.
Keywords
Frequency measurement; Power system; Relay; Phase locked-loop;
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