• Title/Summary/Keyword: code synchronization

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Design Automation for Enterprise System based on .NET with Extended UML Profile Mechanism

  • Kum, Deuk-Kyu
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.12
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    • pp.115-124
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    • 2016
  • In this paper, a method to generate the extended model automatically on the critical elements in enterprise system based real time distributed architecture as well as the platform specific model(PSM) for Microsoft(MS) .NET platform is proposed. The key ideas of this method are real time distributed architecture should performed with satisfying strict constraints on life cycle of object and response time such as synchronization, transaction and so on, and .NET platform is able to implement functionalities including before mentioned by only specifying Attribute Code and maximizing advantages of MDA. In order to realize the ideas, functionalities which should be considered enterprise system development are specified and these are to be defined in Meta Model and extended UML profile. In addition, after definition of UML profile for .NET specification, by developing and applying these into plug-in of open source MDA tool, and extended models are generated automatically through this tool. Accordingly, by using proposed specification technology, the profile and tools easily and quickly reusable extended model can be generated even though low level of detailed information for functionalities which is considered in .NET platform and real time distributed architecture. In addition, because proposed profile is MOF which is basis of standard extended and applied, UML and MDA tools which observed MOF is reusable.

Performance Analysis on Clock Sychronization of CCK Modulation Scheme in Wireless LAN System (무선 LAN 시스템에서 CCK 변조방식의 클럭 동기 성능 분석)

  • 박정수;강희곡;조성언;조성준
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05b
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    • pp.583-586
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    • 2004
  • In this paper, we have analyzed the performance of synchronization of CCK(Complementary Code Keying) modulation scheme used for IEEE 802.11g wireless LAM system supporting 54 Mbps of high speed data rate over 2.4 GHz. At receiver, the clock frequency offset is caused by noise or fading. This frequency error occurs the offset of clock timing and causes ISI. Therefore the tracking is required to reduce the clock timing offset. The DLL(Delay Lock Loop), asychronization mode, performing tacking the clock is used for the simulation. The simulation result shows jitter variance and BER performance in the AWGN and multipath fading channel environment.

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A Systematic Design Automation Method for RDA-based .NET Component with MDA

  • Kum, Deuk Kyu
    • Journal of Internet Computing and Services
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    • v.20 no.2
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    • pp.69-76
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    • 2019
  • Recent Enterprise System has component driven real-time distributed architecture (RDA) and this kind of architecture should performed with satisfying strict constraints on life cycle of object and response time such as synchronization, transaction and so on. Microsoft's .NET platform supports RDA and is able to implement services including before mentioned time restriction and security service by only specifying attribute code and maximizing advantages of OMG's Model Driven Architecture (MDA). In this study, a method to automatically generate an extended model of essential elements in an enterprise-system-based RDA as well as the platform specific model (PSM) for Microsoft's .NET platform are proposed. To realize these ideas, the functionalities that should be considered in enterprise system development are specified and defined in a meta-model and an extended UML profile. In addition, after defining the UML profile for .NET specification, these are developed and applied as plug-ins of the open source MDA tool, and extended models are automatically generated using this tool. Accordingly, by using the proposed specification technology, the profile and tools can easily and quickly generate a reusable extended model even without detailed coding-level information about the functionalities considered in the .NET platform and RDA.

Efficient Authentication Protocol for Low-Cost RFID System (저비용 RFID 시스템에 적합한 효율적인 인증 방법)

  • Kim, Jin-Ho;Seo, Jae-Woo;Lee, Pil-Joong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.18 no.2
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    • pp.117-128
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    • 2008
  • Compared with the existing bar code system, RFID system has lots of advantages such as it identifies automatically massive objects. We might anticipate RFID technology will be a substitution for an optical bar code system in the near future. However, their feature that uses radio waves may cause various security problems. Many kinds of solutions have been researched to overcome these security problems. In this paper, we analyze the previous proposed protocols. And then, we categorize RFID authentication into two types according to the synchronization requirement between a Back-end Database and a Tag. In addition, we introduce the previous proposed approaches to tag search problem in RFID authentication. And we propose an efficient method which provides fast tag search by using membership test algorithm, a Bloom filter.

DSSS MODEM Design and Implementation for a Medium Speed Wireless Link (대중저속 무선 통신을 위한 DSSS 모뎀 설계 및 구현)

  • Won Hee-Seok;Kim Young-Sik
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.1 s.343
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    • pp.121-126
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    • 2006
  • This paper report on the design and implementation of a 9.6kbps DSSS CDMA modem for a medium speed wireless link. The proposed modem provides a general purpose I/O interface with a microprocessor. The I/O interface consists of 8-bit data bus, chip enable, read/write, and interrupt pins. In transmit block, the 8-bit data delivered from the I/O interface buffer is converted to 9.6kbps serial data, which are spreaded into 76.8kcps with 8-bit PN code generated inside the modem by direct sequence method. An 8-bit training sequence is preceded in the data frame for data synchronization in receiver. In receiver block the PN code is synchronized from the received data spreaded to 76.8kcps and find the data timing from the 8-bit training sequence. We have used the Early-and-Late integration method. The modem has been implemented and verified using a Xilix FPGA board and has been fabricated as an ASIC CHIP through Hynir $0.25{\mu}m$ CMOS. The multiple accessing method is DSSS CDMA.

Kernel-level Software instrumentation via Light-weight Dynamic Binary Translation (경량 동적 코드 변환을 이용한 커널 수준 소프트웨어 계측에 관한 연구)

  • Lee, Dong-Woo;Kim, Jee-Hong;Eom, Young-Ik
    • Journal of Internet Computing and Services
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    • v.12 no.5
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    • pp.63-72
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    • 2011
  • Binary translation is a kind of the emulation method which converts a binary code compiled on the particular instruction set architecture to the new binary code that can be run on another one. It has been mostly used for migrating legacy systems to new architecture. In recent, binary translation is used for instrumenting programs without modifying source code, because it enables inserting additional codes dynamically, For general application, there already exists some instrumentation software using binary translation, such as dynamic binary analyzers and virtual machine monitors. On the other hand, in order to be benefited from binary translation in kernel-level, a few issues, which include system performance, memory management, privileged instructions, and synchronization, should be treated. These matters are derived from the structure of the kernel, and the difference between the kernel and user-level application. In this paper, we present a scheme to apply binary translation and dynamic instrumentation on kernel. We implement it on Linux kernel and demonstrate that kernel-level binary translation adds an insignificant overhead to performance of the system.

Analysis of characteristics and location of the appearance for codding pattern in the source code (소스 코드에 포함된 코딩 패턴의 특성과 출현 위치 관련성에 대한 분석)

  • Kim, Young-Tae;Kong, Heon-Tag;Kim, Chi-Su
    • Journal of Digital Convergence
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    • v.11 no.7
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    • pp.165-171
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    • 2013
  • Coding patterns that appeared frequently in the source code is a typical piece of code. The functionality that difficult to modularize, such as logging or synchronization processing, and the useful sentences in programming is extracted in software as codding pattern. Large-scale software could not be analyzed fully because the number of coding pattern that can be manually investigated is limited. In this paper, the characteristics of coding patterns perform the evaluation. The goal is to extract for codding-pattern to analyzed by developer. We was selected 6 indicators and performed analysis of 4 open-source. Matrix relations between the values and characteristics of the actual pattern analysis, pattern instances, the width of the distribution of instances, the pattern repeating structure of the elements included in the rates should be analyzed for patterns and indicators that help in choosing was confirmed.

Study on signal processing techniques for low power and low complexity IR-UWB communication system using high speed digital sampler (고속 디지털 샘플러 기술을 이용한 저전력, 저복잡도의 초광대역 임펄스 무선 통신시스템 신호처리부 연구)

  • Lee, Soon-Woo;Park, Young-Jin;Kim, Kwan-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.12 s.354
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    • pp.9-15
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    • 2006
  • In this paper, signal processing techniques for noncoherent impulse-radio-based UWB (IR-UWB) communication system are proposed to provide system implementation of low power consumption and low complexity. The proposed system adopts a simple modulation technique of OOK (on-oft-keying) and noncoherent signal detection based on signal amplitude. In particular, a technique of a novel high speed digital sampler using a stable, lower reference clock is developed to detect nano-second pulses and recover digital signals from the pulses. Also, a 32 bits Turyn code for data frame synchronization and a convolution code as FEC are applied, respectively. To verify the proposed signal processing techniques for low power, low complexity noncoherent IR-UWB system, the proposed signal processing technique is implemented in FPGA and then a short-range communication system for wireless transmission of high quality MP3 data is designed and tested.

Performance Comparison of EFTS According by Modulations and Channel Codes (변조 방식과 채널 코드에 따른 EFTS 성능 비교)

  • Kang, Sanggee
    • Journal of Satellite, Information and Communications
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    • v.8 no.2
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    • pp.94-98
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    • 2013
  • A report of security problems and simultaneous operation limits of Standard tone currently used for FTS introduces the development of a next generation FTS. In this paper, BER performance by modulations and channel coding methods for EFTS are compared. Simulation results show that coherent modulations have better BER performance than noncoherent modulations. However the environments of a lunching vehicle may cause serious problems in achieving and maintaining synchronization and the increasing complexity of coherent systems also increases reliability problems. Therefore noncoherent systems are suitable for FTS even though BER performace of noncoherent systems is lower than coherent systems. Noncoherent DPSK has better BER performance than noncoherent CPFSK. However the PEP of noncoherent DPSK is 0.8dB higher than noncoherent CPFSK. Therefore a transmitter of noncoherent DPSK has more output power than noncoherent CPFSK. Convoltional code has better BER performance than RS code. However RS code has a tendency of steeply decreasing BER near the wanted $E_b/N_0$.

A Morphological Analyzer with Multi-Threads Method (다중 스레드 방식을 도입한 형태소 해석기)

  • 최유경;안동언;정성종;이신원;두길수;노영만;오형진;김금영;이동광
    • Proceedings of the IEEK Conference
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    • 2001.06c
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    • pp.181-184
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    • 2001
  • In recent, a morphological analyzer be used for indexing system in information retrieval system. A morphological analyzer as a indexing system must have multiprocessing ability to deal with multiple users and documents. To meet the needs of these, we propose a morphological analyzer with multi-threads method. To use multi-threads method, we consider memory allocation problem, threads synchronization problem, code optimization and so on. In this paper, first, we report several manners for multi-threads. And next, to evaluate our proposed system, we make a comparison test between proposed system and existing system.

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