• Title/Summary/Keyword: code acquisition

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Dual-Cell Combining Detection Method for Reduction of Residual Frequency Offset Influence on Code Acquisition Systems (나머자 옵셋이 부호획득 시스템에 미치는 영향을 줄이기 위한 듀얼셀 결합 검파 알고리즘)

  • Chong, Da-Hae;Lee, Young-Yoon;Yoon, Tae-Ung;Lee, Young-Po;Lee, Myung-Soo;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.7C
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    • pp.715-723
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    • 2009
  • In this paper, we propose a new detection method called dual-cell combining (DCC) detection for the acquisition in time of spread spectrum codes in the presence of residual frequency offset (RFO). When the RFO exists, the correlation peak used for detection during the acquisition process is split into two neighboring peaks with smaller amplitudes, resulting in considerable degradation in the overall acquisition performance of conventional methods. In the DCC detection method, the decision variable for detection is formed by combining two consecutive correlator outputs so that the influence of the reduction in the correlation peak due to the RFO can be alleviated. Numerical results show that the DCC detection method can offer better mean-time-to-synchrouization performance than the conventional method based on the cell-by-cell detection.

Parallel Code Acquisition Techniques in Chip-Asynchronous DS/SS System (직접 수열 대역 확산 통신에서 비동기 위상 서명 수열의 병렬 부호 획득 기법)

  • 오미정;윤석호;송익호;배진수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.7A
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    • pp.635-640
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    • 2002
  • We investigate optimal and suboptimal decision rules for parallel code acquisition in chip asynchronous direct-sequence spread-spectrum systems. The conventional decision rule for parallel acquisition is to choose the largest correlator output of a receiver. However, such a scheme is optimum only for chip synchronous models. In this paper, an optimal decision rule is derived based on the maximum-likehood criterion for chip asynchronous models. A simpler suboptimal decision rule is also discussed. The performance of the optimum and suboptimum decision rules is compared to that of the conventional decision rule. Numerical results show that, for chip asynchronous models, both the optimal and suboptimal decision rules outperform the conventional decision rule.

The Hardware Design for GPS Data Acquisition Circuit (GPS 데이타 수신을 위한 하드웨어 설계)

  • 정영태;김민호;김명돈;홍성일;변건식;정만영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.10
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    • pp.8-17
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    • 1995
  • Recently, in a variety of the application fields, it is interested in GPS receiver as the use of GPS(Global Positioning System) is increased. In this paer, we propose that a type of new receiver of a simple structure as GPS data receiver. This proposed receiver consists of RF stage, local C/A(Coarse/Acquisition) code generator, C/A code correlator, data demodulator and microprocessor controller as a GPS single channel data receiver using the L1 carrier . It is confirmed that the proposed receiver operates well as GPS raw data receiver through experiment.

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Nonparametric PN code acquisition in DS/CDMA systems (직접수열 부호분할 다중접속 계통에서의 비모수 의사잡음 부호 획득)

  • 송익호;이성로
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.37 no.6
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    • pp.372-372
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    • 2000
  • In this paper, we propose to use nonparametric detector for the PN code acquisition in DS/CDMA systems. Because the detector is nonparametric, we can decide the threshold of the detector without first haying to estimate the valiance of time-varying interference. We compare the proposed detector with the conventional detector by showing both analytic and simulation results. From these results, we can observe that the DS/CDMA system with the proposed detector have better performance than that with the conventional detector when the exact estimation of the interference variance is not possible.

FPGA circuit implementation of despreading delay lack loop for GPS receiver and preformance analysis (GPS 수신기용 역확산 지연 동기 루프의 FPGA 회로 구현과 성능 분석)

  • 강성길;류흥균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.3
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    • pp.506-514
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    • 1997
  • In this paper, we implement digital circuit of despreading delay lock loop for GPS receiver. The designed system consists of Epoch signal generator, two 13bit correlators which correlates the received C/A code and the locally generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock synthesizer which generates the clock of the C/A code generator to control the phase and clock rate, the clock controller, and the clock divider. The designed circuit has the function of the acquisition and tracking by the autocorrelation characteristics of Gold code. The controller generates each other control signals according to the correlation value. The designed circuit is simulated to verify the logic functional performance. By using the simulator STR-2770 that generates the virtual GPS signal, the deigned FPGA chip is verified the circuit performance.

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Analysis of GPS Signal Acquisition Performance

  • Li, Xiaofan;Manandhar, Dinesh;Shibasaki, Ryosuke
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.2
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    • pp.229-234
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    • 2006
  • Acquisition is to detect the presence of the GPS signal. Once the signal is detected, the estimated frequency and code phase are passed to a tracking loop to demodulate the navigation data. In order to detect the weak signal, multiple length of data integration is always needed. In this paper, we present five different acquisition approaches based on circular correlation and Fast Fourier Transform (FFT), using coherent as well as non-coherent integration techniques for the multiple length of collected GPS satellite signal. Moreover a general approach of determining the acquisition threshold is introduced based on noise distribution which has been proved effective, and independent of the hardware. In the end of this paper, the processing speed and acquisition gain of each method are illustrated, compared, and analyzed. The results show that coherent approach is much more time consuming compared to noncoherent approaches, and in the case of multiple length of data integration from 2ms to 8ms, the processing times consumed by the fastest non-coherent acquisition method are only 25.87% to 1.52% in a single search, and 34.76% to 1.06% in a global search of those in the coherent acquisition. However, coherent acquisition also demonstrates its better performance in the acquisition gain, and in the case of 8ms of data integration it is 4.23 to 4.41 dB higher than that in the non-coherent approaches. Finally, an applicable scheme of combining coherent and non-coherent acquisition approaches in the development of a real-time Software GPS receiver in the University of Tokyo is provided.

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A Study on Initial Cell Search Parameters in UMTS Terminal Modem (UMTS 단말기 모뎀의 초기 셀 탐색 파라미터의 영향에 대한 연구)

  • 류동렬;김용석;옥광만;최형진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.5A
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    • pp.267-275
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    • 2003
  • In UMTS terminal modem uses 3 step search procedure for initial cell search, which comprises 1) slot synchronization, 2) code group identification and frame synchronization, and 3) scrambling-code identification. The performance of initial cell search procedure depends on search parameters like observation time and threshold. The purpose of this paper is to get the optimal observation time and threshold of each step for minimum mean acquisition time. In this paper we induce mean detection time of each step and mean acquisition timefrom the model of 3 step search procedure using state diagram. Also we propose initial cell search algorithm which utilize window search method against initial oscillator error, and select an appropriate observation time and threshold of each step by the analysis of simulation and induced result. It is shown that the mean acquisition time in multipath fading channel can be shorter than 500ms by using the determined observation time and threshold of each step.