• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.4
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• pp.39-46
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• 2009

In this paper, we propose a full digital capacitive sensing touch key reducing the effects due to the variations of resistance and clock frequency. The proposed circuit consists of two capacitive loads to measure and a resistor between the capacitive loads. The method measures the delays of the resistor and two capacitive loads, respectively. The ratio of the two delays is represented as the ratio of the two capacitive loads and is irrelative to the resistance and the clock frequency if quantization error is disregarded. Experimental results show the proposed scheme efficiently reduces the effects due to the variations of clock frequency and resistance. Further more the method has l.04[pF] resolution and can be used as a touch key.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.7C
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• pp.608-615
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• 2007

Generally time of arrival (TOA) information via two way communications can be derived by accurate round trip time (RTT) between two devices. However, response time demanded in RTT measurement is long, a serious TOA error is caused by each different clock drift between two devices. In order to solve this problem, we propose the TOA and time difference of arrival (TDOA) estimation scheme with mitigating clock drift effect. To verify the performance of proposed method, we compared the proposed scheme with one way based TDOA acquisition method introduced by IEEE 802.15.4a Task Group and then we could conclude that the proposed method has better performance over other methods.

• ETRI Journal
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• v.29 no.5
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• pp.633-640
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• 2007

We report an experimental demonstration of 40 Gbps all-optical 3R regeneration with all-optical clock recovery based on InP semiconductor devices. We also obtain alloptical non-return-to-zero to return-to-zero (NRZ-to-RZ) format conversion using the recovered clock signal at 10 Gbps and 40 Gbps. It leads to a good performance using a Mach-Zehnder interferometric wavelength converter and a self-pulsating laser diode (LD). The self-pulsating LD serves a recovered clock, which has an rms timing jitter as low as sub-picosecond. In the case of 3R regeneration of RZ data, we achieve a 1.0 dB power penalty at $10^{-9}$ BER after demultiplexing 40 Gbps to 10 Gbps with an eletroabsorption modulator. The regenerated 3R data shows stable error-free operation with no BER floor for all channels. The combination of these functional devices provides all-optical 3R regeneration with NRZ-to-RZ conversion.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.1
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• pp.170-178
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• 2004

In this work a high speed 8-error correcting Reed-Solomon decoder is designed using the modified Euclid algorithm. Decoding algorithm of Reed-Solomon codes consists of four steps, those are, compute syndromes, find error-location polynomials, decide error-locations, and determine error values. The decoding speed is increased and the latency is reduced by using the parallel architecture in the syndrome generator and a faster clock speed in the modified Euclid algorithm block. In addition. the error locator polynomial in Chien search block is separated into even and odd terms to increase the overall speed of the decoder. All the functionalities of the decoder are verified first through C++ programs. Verilog is used for hardware description, and then the decoder is synthesized with a $.25{\mu}m$ CMOS TML library. The functionalities of the chip is also verified through test vectors. The clock speed of the chip is 250MHz, and the maximum data rate is 1Gbps.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.80-87
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• 2006

SONY corporation preoccupies $80\%$ of a market of the CCD used in a CCTV system. The CCD of SONY have high duality which can not follow the progress of capability. But there are some problems which differ the clock frequency used in CCD from the frequency used in common video encoder. To get the result by using common video encoder, the system needs a scaler that could adjust image size and PLL that synchronizes CCD's with encoder's clock So, this paper proposes the video encoder that is activated at equal clock used in CCD without scaler and PLL. The encoder converts ITU-R BT.601 4:2:2 or ITU-R BT.656 inputs from various video sources into NTSC or PAL signals in CVBS. Due to variable clock, property of filters used in the encoder is automatically changed by clock and filters adopt multiplier-free structures to reduce hardware complexity. The hardware bit width of programmable digital filters for luminance and chrominance signals, along with other operating blocks, are carefully determined to produce hish-quality digital video signals of ${\pm}1$ LSB error or less. The proposed encoder is experimentally demonstrated by using the Altera Stratix EP1S80B953C6ES device.

• Journal of Advanced Navigation Technology
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• v.18 no.5
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• pp.421-428
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• 2014

GPS satellite positions can be obtained from the navigation message transmitted from the GPS satellite. In this paper, the accuracy of broadcast orbit and clock are analyzed by comparing with the NGA precise ephemeris. For analyzing global and local orbit errors in 2004 to 2013, GPS satellite visibilities are calculated in Korea. Local RMS of 3D orbit error and SISRE are 4 cm and 3 cm less than global RMS of 3D orbit errors and SISRE. Orbit and clock errors are calculated for each GPS satellite Block for 10 years. SISRE of Block IIA satellites are 2.8 times greater than Block IIF satellites. The correlation between orbit errors and shadow condition is analyzed. The orbit errors in shadow is 2.1% higher than that in sunlight. Correlation analysis between the orbit errors and solar/geomagnetic index shows that orbit errors has a high correlation with from 2004 to 2008. However, the correlation became low since 2009.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.6
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• pp.1312-1317
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• 2013

Pseudolite is a contraction of the term "pseudo-satellite", used to refer to something that is not a satellite which performs a function commonly in the domain of satellites. Pseudolite are most often small transceivers that are used to create a local, ground-based GPS alternative. Pseudo-range measurement of pseudolite has around 300m range error, when time synchronization error of $1{\mu}sec$ occurs. Therefore the time synchronization methods play an important part in navigation augmentation using pseudolite. This paper proposes three clock synchronization methods that are installation method of pseudolite station, method using KRISS-UTC and method using PRN code phase difference for pseudolite. The simulation platform structure is presented for evaluating proposed clock synchronization performance.

• The Transactions of the Korea Information Processing Society
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• v.7 no.1
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• pp.235-244
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• 2000

This paper presents a low power PLL based clock geneator circuit for microprocessors. It generates 32MHz${\sim}$1GHz clocks and can be integrated inside microprocessor chips. A high speed D Flip-Flop is designed using dynamic differential latch and a new Phase Frequency Detector(PFD) based on this FF is presented. The PFD enjoys low error characteristics in phase sensitivity and the PLL using this PFD has a low phase error. To improve the linearity of voltage controlled oscillator(VCO) in PLL, the voltage to current converter and current controlled oscillator combination is suggested. The resulting PLL provides wide lock range and extends frequency of generated clocks over 1 GHz. The clock generator is designed by using $0.65\;{\mu}m$ CMOS full custom technology and operates with $11\;{\mu}s$ lock-in time. The power consumption is less than 20mW.

• Journal of Positioning, Navigation, and Timing
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• v.3 no.4
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• pp.155-161
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• 2014

The purpose of this study is to develop precise point positioning (PPP) algorithms based on GLONASS code-pseudorange, verify their performance and present their utility. As the basic correction models of PPP, we applied Inter Frequency Bias (IFB), relativistic effect, satellite antenna phase center offset, and satellite orbit and satellite clock errors, ionospheric errors, and tropospheric errors that must be provided on a real-time basis. The satellite orbit and satellite clock errors provided by Information-Analytical Centre (IAC) are interpolated at each observation epoch by applying the Lagrange polynomial method and linear interpolation method. We applied Global Ionosphere Maps (GIM) provided by International GNSS Service (IGS) for ionospheric errors, and increased the positioning accuracy by applying the true value calculated with GIPSY for tropospheric errors. As a result of testing the developed GLONASS PPP algorithms for four days, the horizontal error was approximately 1.4 ~ 1.5 m and the vertical error was approximately 2.5 ~ 2.8 m, showing that the accuracy is similar to that of GPS PPP.

• Journal of Positioning, Navigation, and Timing
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• v.9 no.4
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• pp.347-356
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• 2020

In this study, Inclined Geosynchronous Orbit (IGSO) and Geostationary Orbit (GEO) of BeiDou System (BDS) and Quasi Zenith Satellite System (QZSS) satellites positions and clock errors calculated by broadcast ephemeris and compared with Multi-GNSS Experiment (MGEX) products provided by five Analysis Centers (ACs). Root Mean Square Errors (RMSE) calculated for satellite position error. The IGSO results showed that 1.82 m, 0.91 m, 1.28 m in BDS and 1.34 m 0.36 m 0.49 m in QZSS and the GEO results showed that 2.85 m, 6.34 m, 6.42 m in BDS and 0.47 m, 4.79 m, 5.82 m in QZSS in the direction of radial, along-track and cross-track respectively. RMS calculated for satellite clock error. The IGSO result showed that 2.08 ns and 1.24 ns and the GEO result showed that 1.28 ns and 1.12 ns in BDS and QZSS respectively.