• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.2 s.302
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• pp.27-36
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• 2005

This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.1037-1044
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• 2010

In this paper, a new size-reduced, wideband ring-hybrid coupler is presented, and a design of a planar single-balanced doubler using the ring-hybrid is shown. This ring-hybrid coupler employs a pair of ultra-wideband transitions for phase inversion, which consists of in-phase and out of-phase transitions providing a good amplitude and phase balances for wide frequency ranges. The implemented ring-hybrid is 65 % smaller than conventional ring-hybrids, and provides 92.5 % and 81.3 % bandwidth at $\sum$ and $\Delta$ ports, respectively. Thanks to good amplitude and phase balances over wide bandwidth, the ring-hybrid can be applied to implement various balanced components. The implemented single-balanced doubler utilizing the ring-hybrid exhibits typical conversion loss of 10.5 dB for the output frequency range of 4~12 GHz with fundamental suppression level of 30 dB. The performance was also well-predicted with the nonlinear circuit simulation.

• Nuclear Engineering and Technology
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• v.48 no.5
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• pp.1273-1279
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• 2016

Production of iodine-131 by neutron activation of tellurium in tellurium dioxide ($TeO_2$) material requires a target that meets the safety requirements. In a radiopharmaceutical production unit, a new lid for a can was designed, which permits tight sealing of the target by using tungsten inert gaswelding. The leakage rate of all prepared targets was assessed using a helium mass spectrometer. The accepted leakage rate is ${\leq}10^{-4}mbr.L/s$, according to the approved safety report related to iodine-131 production in the TRIGA Mark II research reactor (TRIGA: Training, Research, Isotopes, General Atomics). To confirm the resistance of the new design to the irradiation conditions in the TRIGA Mark II research reactor's central thimble, a study of heat effect on the sealed targets for 7 hours in an oven was conducted and the leakage rates were evaluated. The results show that the tightness of the targets is ensured up to $600^{\circ}C$ with the appearance of deformations on lids beyond $450^{\circ}C$. The study of heat transfer through the target was conducted by adopting a one-dimensional approximation, under consideration of the three transfer modes-convection, conduction, and radiation. The quantities of heat generated by gamma and neutron heating were calculated by a validated computational model for the neutronic simulation of the TRIGA Mark II research reactor using the Monte Carlo N-Particle transport code. Using the heat transfer equations according to the three modes of heat transfer, the thermal study of I-131 production by irradiation of the target in the central thimble showed that the temperatures of materials do not exceed the corresponding melting points. To validate this new design, several targets have been irradiated in the central thimble according to a preplanned irradiation program, going from4 hours of irradiation at a power level of 0.5MWup to 35 hours (7 h/d for 5 days a week) at 1.5MW. The results showthat the irradiated targets are tight because no iodine-131 was released in the atmosphere of the reactor building and in the reactor cooling water of the primary circuit.

• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.115-122
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• 2004

In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.828-833
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• 2018

It is well known that reflected waves and resonance affect phase distortion. In addition, phase delay can be distorted by antenna impedance. In this study, we analyze the phase delay variation caused by the antenna impedance, considering mutual coupling effects. In addition, we confirm the beam steering characteristics. When was -10 dB and -7 dB, the maximum phase delay error was $18.5^{\circ}$ and $26.5^{\circ}$, respectively. The Monte Carlo simulation with an eight-element linear array antenna demonstrated that the RMS error of the beam steering angle ranged from $0.19^{\circ}$ to $0.4^{\circ}$, and the standard deviation ranged from $0.14^{\circ}$ to $0.33^{\circ}$ when the beam steering angle was in the range of $0^{\circ}$ to $30^{\circ}$, with the uniformly distributed phase error of $18.5^{\circ}$ and $26.5^{\circ}$. The side lobe level increased from 0.74 dB to 1.21 dB by the phase error from the theoretical value of -12.8 dB, with a standard deviation of 0.31 dB to 0.51 dB. This is verified by designing an eight-element spiral array antenna.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.9
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• pp.14-23
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• 2010

This paper reports the fabrication of a DVB-T/H System in Package (SiP) that is able to receive and process the DVB-T/H signal. The DVB-T/H is the European telecommunication standard for Digital Video Broadcasting (DVB). An IC-embedded Printed Circuit Board (PCB) process, interpose a chip between PCB layers, has applied to the DVB-T/H SiP. The chip inserted in DVB-T/H SiP is the System on Chip (SoC) for mobile TV. It is comprised of a RF block for DVB-T/H RF signal and a digital block to convert received signal to digital signal for an application processor. To operate the DVB-T/H IC, a 3MHz DC-DC converter and LDO are on the DVB-T/H SiP. And a 38.4MHz crystal is used as a clock source. The fabricated DVB-T/H SiP form 4 layers which size is $8mm{\times}8mm$. The DVB-T/H IC is located between 2nd and 3rd layer. According to the result of simulation, the RF signal sensitivity is improved since the layout modification of the ground plane and via. And we confirmed the adjustment of LC value on power transmission is necessary to turn down the noise level in a SiP. Although the size of a DVB-T/H SiP is decreased over 70% than reference module, the power consumption and efficiency is on a par with reference module. The average power consumption is 297mW and the efficiency is 87%. But, the RF signal sensitivity is declined by average 3.8dB. This is caused by the decrease of the RF signal sensitivity which is 2.8dB, because of the noise from the DC-DC converter.