• 전력전자학회논문지
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• 제20권3호
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• pp.223-231
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• 2015

LEDs have been widely used in lighting displays, automobiles, and airplanes owing to their excellent light output characteristics and long lifespan. Though LEDs are manufactured under the same process, variations in impurity concentrations cause electrical deviation among LEDs. The resulting electrical deviation can not only reduce the life time of the LED but also cause non-uniform luminance of LEDs connected in parallel. LED driving circuit is required to solve these problems. In this paper, we propose a LED driving system using Y-type current balancing transformer to maximize the efficiency of the system by removing output stage Schottky diodes. Experimental results are presented to verify the performance of proposed LED driving system that is applied to 80 W LED modules.

• 조명전기설비학회논문지
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• 제27권5호
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• pp.26-32
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• 2013

The LED has the proportional characteristic between the flux of light and its current and has caused voltage-current deviation on production process. Thus the unbalancing of each LED strings current occurred by its characteristic deviation. This unbalancing reduce a uniformity of the flux of light. Therefore, we researched to design method the LED driver based on DSP and the balancing transformer for a LED current balancing. These are applied to 50W LED module consist of 4 parallel strings. We analyzed the reduction of LED currents unbalance by experimental result from each method.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.350-352
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• 2007

Modularized charge equalization converter for HEV lithium-ion battery cells is proposed in this paper, in which intra-module and inter-module charge equalization can be achieved at the same time. For intra-module charge equalization, the conventional flyback DC/DC converters of low power and small size are employed, in which all of the primary sides are coupled in parallel for selective charge of the specific under charged cell within the module. For inter-module charge equalization, the flyback DC/DC converters are also added, in which all the secondary windings are electrically linked in parallel for automatic charge balancing among the modules. An engineering sample of forty cells hiring the proposed cell balancing scheme is implemented and its experimental result shows that the proposed modularized charge equalization circuit has good cell balancing performance.

• 전력전자학회논문지
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• 제19권6호
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• pp.564-571
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• 2014

A single-stage current-balancing multi-channel light-emitting diode (LED) driver is proposed in this study. The conventional LED driver system consists of two cascaded power conversion stages, i.e., an isolation DC/DC converter and LED driver. LED driver is usually implemented with the same number of expensive boost converters as those of LED channels to tightly control the current through each LED channel. Therefore, its overall system size is not only bulky, but the cost is rather high. By contrast, the proposed LED driver system is composed of a single power stage with the DC/DC converter and LED driver merged. Although the current balancing circuit of the proposed LED driver requires only passive devices instead of expensive boost converters, all currents through multi-channel LEDs can be well balanced. Therefore, the proposed LED driver features a small system size, improved efficiency, and low cost. To confirm the validity of the proposed driver, its operation and performance are verified on a prototype for a 46" LED TV.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.443-450
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• 2014

This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.432-433
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• 2018

A new DC-DC converter circuit for LVDC(Low Voltage Direct-Current) distribution is proposed. DC-DC converter consists of two stage which are voltage balancer and converter stage. The balancing circuit adjust balance input voltage of converter circuit and compensate for unbalanced loads and short circuits. The converter circuit control the bipolar output voltage ${\pm}750V$. Simulation is carried out for this DC-DC converter system.

• 국제물리치료학회지
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• 제3권1호
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• pp.370-377
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• 2012

This study examines the effects of different environments on the application of hemiplegia patients circuit balance training. Group 1 performed circuit balance training without any auditory intervention Group 2 performed training in noiseless environments and Group 3 performed training in white noise environments. First, among lower extremity muscular strength evaluation items, maximum activity time(MAT) was not significantly different(p>.05). Maximum muscle strength(MMS) increased significantly in Group 3(p<.01), there was no significant difference in MMS among the groups. Average muscle strength(AMS) indexes also significantly increased in Group 3(p<.01), there was no significant difference in AMS among the groups. Second, among balancing ability evaluation items, Berg's balance scale(BBS) scores significantly increased in all groups(p<.05), BBS scores were significantly difference among the groups. Based on the results, Group 1, 2 and Group 1, 3 showed significant increases (p<.05). Functional reach test(FRT) values significantly increased in Group 2, 3(p<.05), and there was no significant difference in FRT values among the groups. Timed up and go(TUG) test values significantly decreased in Group 2, 3(p<.05), and there was no significant difference in TUG test values among the groups. Third, among walking speed evaluation items, the time required to walk 10m significantly decreased in all groups(p<.05), and there was no significant difference in the values among the groups. Average walking speeds showed significant increases in Group 1, 3(p<.05), and there was no significant difference in the values among the groups. Based on the results of this study, noise environments should be improved by either considering auditory interventions and noiseless environments, or by ensuring that white noise environments facilitate the enhancement of balancing ability.

• Journal of Electrical Engineering and Technology
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• 제12권2호
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• pp.701-710
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• 2017

This paper presents a five-level PWM inverter using series and parallel connection of voltage sources. The alternative connection is done by an auxiliary circuit consisted of a switch, three diodes, and two batteries. The auxiliary circuit is located between input dc voltage source and H-bridge cell. Thanks to the auxiliary circuit, the proposed inverter synthesizes five-level output voltage in an effective way. Topologically both batteries are charged and discharged in the same rate, so it does not need to apply battery voltage balancing control method. Theoretical analysis of the proposed inverter is verified by computer-aided simulation and experiment based on a prototype of 1kW.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.1966-1968
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• 1998

This paper describes a gate drive circuit for series connected IGBTs in high voltage applications. The proposed control criterion of the gate circuit is to actively limit the voltages during switching transients, while minimizing switching transient and losses. In order to achieve the control criterion, an analog closed loop control scheme is adopted. The performance of gate drive circuit is examined experimentally by the series connection of three IGBTs with conventional snubber circuits. The experimental results show the voltage balancing by an active control under wide variation in loads and imbalance conditions.

• Journal of Power Electronics
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• 제15권3호
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• pp.660-669
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• 2015

This paper presents a control scheme with a focus on the combination of phase disposition pulse width modulation (PDPWM) and DC capacitor voltage control for a chopper-cell based modular multilevel converter (MMC) for the purpose of eliminating the time-consuming voltage sorting algorithm and complex voltage balancing regulators. In this paper, the convergence of the DC capacitor voltages within one arm is realized by charging the minimum voltage module and discharging the maximum voltage module during each switching cycle with the assistances of MAX/MIN capacitor voltage detection and PDPWM signals exchanging. The process of voltage balancing control introduces no extra switching commutation, which is helpful in reducing power loss and improving system efficiency. Additionally, the proposed control scheme also possess the merit of a simple executing procedure in application. Simulation and experimental results indicates that the MMC circuit together with the proposed method functions very well in balancing the DC capacitor voltage and improving system efficiency even under transient states.