• 마이크로전자및패키징학회지
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• 제14권3호
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• pp.57-64
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• 2007

Si 칩에 박막히터를 형성하고 이에 전류를 인가하여 LCD (liquid crystal display) 패널의 유리기판은 가열하지 않으면서 Si 칩만을 선택적으로 가열함으로써 Si 칩을 LCD 패널의 유리기판에 실장 하는 새로운 COG 공정기술을 연구하였다. $5\;mm{\times}5\;mm$ 크기의 Si 칩에 마그네트론 스퍼터링법으로 폭 $150\;{\mu}m$,두께 $0.8\;{\mu}m$, 전체 길이 12.15 mm의 정방형 Cu 박막히터를 형성하였으며, 이에 0.9A의 전류를 60초 동안 인가하여 Si칩의 Sn-3.5Ag 솔더범프를 리플로우 시킴으로써 Si 칩을 유리기판에 COG 본딩하는 것이 가능하였다.

• 전기학회논문지
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• 제59권9호
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• pp.1615-1620
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• 2010

A thin film thermoelectric cooler for COB direct assembly was proposed and the COB cooler structure was modeled by electrical equivalent circuit by using SPICE model of thermoelectric devices. The embedded cooler attached between the die chip and metal plate can offer the possibility of thin film active cooling for the COB direct assembly. We proposed a driving method of TEC by using pulse width modulation technique. The optimum power to the TEC is simulated by using a SPICE model of thermoelectric device and passive components representing thermal resistance and capacitance. The measured and simulated results offer the possibility of thin film active cooling for the COB direct assembly.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1991년도 추계학술대회 논문집
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• pp.73-78
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• 1991

In this study of stacked type film chip capacitor, the important parameters are heat-treated temperature, pressure and time. We measured the temperature dependence of dielectric properties and dissipation factor and the frequency dependence of dielectric properties, dissipation factor, ESR(Equivalent Series Resistance) and impedance in stacked type film capacitor. As a result, the best conditions of heat-treated temperature, pressure and time were proved to be 130$^{\circ}C$, 10kg/$\textrm{cm}^2$ and 3hrs, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.71-71
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• 2009

This paper describes a simple, on-chip CMOS compatible the thin-film inductor applied for the dc-dc converters. A fully CMOS-compatible thin-film inductor with a bottom NiFe core is integrated with the DC-DC converter circuit on the same chip. By eliminating ineffective top magnetic layer, very simple process integration was achieved. Fabricated monolithic thin film inductor showed fairly high inductance of 2.2 ${\mu}H$ and Q factor of 11.2 at 5MHz. When the DC-DC converter operated at $V_{in}=3.3V$ and 5MHz frequency, it showed output voltage $V_{out}=8.0V$, and corresponding power efficiency was 85%.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2009년도 춘계학술대회 논문집
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• pp.1051-1052
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• 2009

• Biotechnology and Bioprocess Engineering:BBE
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• 제9권2호
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• pp.76-85
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• 2004

Biodevices composed of biomolecular layer have been developed in various fields such as medical diagnosis, pharmaceutical screening, electronic device, photonic device, environmental pollution detection device, and etc. The biomolecules such as protein, DNA and pigment, and cells have been used to construct the biodevices such as biomolecular diode, biostorage device, bioelectroluminescence device, protein chip, DNA chip, and cell chip. Substantial interest has focused upon thin film fabrication or the formation of biomaterials mono- or multi-layers on the solid surfaces to construct the biodevices. Based on the development of nanotechnology, nanoscale fabrication technology for biofilm has been emerged and applied to biodevices due to the various advantages such as high density immobilization and orientation control of immoblized biomolecules. This review described the nanoscale fabrication of biomolecular film and its application to bioelectronic devices and biochips.

• 한국염색가공학회지
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• 제21권1호
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• pp.1-9
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• 2009

A lot of research has been made over the recent decade to develop testing packages with antimicrobial properties to improve food safety. In this study, a new method, experimental device and technology for environmental corresponding packages of polypropylene (PP) film has been developed to provide effective temperature buffering during the transport/long-term storage of grains or foodstuffs from the supplier to the market. This quantitatively optimized mixing system enabled to produce PP films with the 700$\sim$1,400d (width;1.5$\sim$3mm, thickness;0.01$\sim$0.5mm). In the whole mixing systems, the finely-granulated inorganic illite and PP virgin chip for master batch (M/B) chip was calculated by digital measurement methods, and then the M/B chip for PP film was adapted through a air jet and PP grinding method. The prepared PP film was characterized with tensile strength and elongation, far infrared radiation (FIR) emissivity, antimicrobial activity and deodorization properties. The results revealed that the two differently grain-sized illite could be show homogeneously dispersed on PP chip surface, and as the increasing of illite content, the FIR emissivity and the anion emission rate of film was increasingly improved. In both of 325 and 1,500 mesh-sized illite contained PP chip, of course the antimicrobial activity was good. But the ultimate deodorization rate for ammonia gas of PP film were found to be approximately the same.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2011년도 춘계학술대회 논문집
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• pp.45-46
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• 2011

• Corrosion Science and Technology
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• 제3권4호
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• pp.172-177
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• 2004

Biaxially oriented polyethylene terephthalate copolymer(BO - PET)film laminated aluminiums have been applied for chip condenser case. The BO PET film is characterized by high molecular which gives high corrosion resistance, good adhesion and high heat resistance. The higher orientation lowers formability of the film. So, optimum orientation has to be controlled during the laminating process. And to confirm the adhesion between BO PET and aluminium and to guarantee the formability of PET laminated aluminums, we have controlled the chromium oxides weight on the aluminium and laminating condition ( laminating temperature, soaking temperature and lag time after nip roll and quenching conditions) This paper discusses the effect of the laminating conditions on the formability of laminated aluminums. As results, it is clear that the orientation of the BO PET film decreased with an increase in the strip temperature. When the film temperature is over the melting point of the film, its orientation drastically decreased.

• 마이크로전자및패키징학회지
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• 제11권1호
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• pp.29-36
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• 2004

초 박형 실리콘 칩을 이용하여 실리콘 칩들을 포함한 모듈 전체가 굽힘이 자유로운 유연 패키징 기술을 구현하였으며 bending test와 FEA를 통해 초 박형 실리콘 칩의 기계적 거동을 살펴보았다. 초박형 실리콘 칩(t<30$\mu\textrm{m}$)은 표면손상의 가능성을 배제하기 위해 KOH및 TMAH둥을 이용한 화학적 thinning 방법을 이용하여 제작되었으며 열압착 방식에 의해 $Kapton^{Kapton}$에 바로 실장 되었다. 실리콘칩과 $Kapton^\circledR$ 기판간의 단차가 적기 때문에 전기도금 방식으로 전기적 결선을 이를 수 있었다. 이러한 방식의 패키징은 이러한 공정은 flip chip 공정에 비해 공정 간단하고 wire 본딩과 달리 표면 단차 적어서 연성회로 기판을 비롯한 인쇄회로기판의 표면뿐만 아니라 기판 자체에 삽입이 가능하여 패키징 밀도 증가를 기대할 수 있으며 실질적인 실장 가능면적을 극대화 할 수 있다.