• Title/Summary/Keyword: chip control

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Supply Chain Ecosystem of Automotive Chip (차량용 반도체 공급망 생태계)

  • Chun, H.S.;Kim, H.T.;Roh, T.M.
    • Electronics and Telecommunications Trends
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    • v.36 no.3
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    • pp.1-11
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    • 2021
  • In this study, we analyze the automotive chip ecosystem that recently caused the global supply shortage, and attempt to derive policy implications for us from the conclusion. Automotive chips are critical parts that control various systems so that a vehicle can drive itself or operate with electricity. The current shortage in supply and demand for automotive chips is due to the inconsistency between supply and demand between automotive chip companies and car manufacturers. To promote the automotive chip industry, new investment incentives, tax cuts, and human resource training are needed.

Chip Load Control Using a NC Verification Model Based on Z-Map (Z-map 기반 가공 검증모델을 이용한 칩부하 제어기)

  • Baek Dae Kyun;Ko Tae Jo;Park Jung Whan;Kim Hee Sool
    • Journal of the Korean Society for Precision Engineering
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    • v.22 no.4
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    • pp.68-75
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    • 2005
  • This paper presents a new method for the optimization of feed rate in sculptured surface machining. A NC verification model based on Z-map was utilized to obtain chip load according to feed per tooth. This optimization method can regenerate a new NC program with respect to the commanded cutting conditions and the NC program that was generated from CAM system. The regenerated NC program has not only the same data of the ex-NC program but also the updated feed rate in every block. The new NC data can reduce the cutting time and produce precision products with almost even chip load to the feed per tooth. This method can also reduce tool chipping and make constant tool wear.

Object-Oriented Programming Based Chip-Mounter Simulator Using Stochastic Petri Nets (확률 페트리 네트를 이용한 객체기향 기반의 칩마운터 시뮬레이터 구현)

  • Park, Gi-Beom;Park, Tae-Hyoung
    • Journal of Institute of Control, Robotics and Systems
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    • v.7 no.6
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    • pp.540-549
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    • 2001
  • An implementation method for chip-mounter simulator is proposed to improve the productivity and utility of electronic assembly lines. The simulator emulates the assembly sequence graphically to verify the chip mounter program in offline. It also presents functions of time estimation and productivity analysis considering the error probability. To increase the flexibility of simulator, stochastic petri nets are applied to modeling of the assembly sequence. The sequence model is then implemented as extendable classes by an object oriented language. The simulator is applied to a commercial chip mounter to verify the usefulness of the method proposed.

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An Assembly Sequence Planning of a Chip Mounter Using Transportation Algorithm (수송알고리즘에 의한 칩마운터의 조립순서계획)

  • Park, Tae-Hyung;Kim, Cheol-Han
    • Journal of Institute of Control, Robotics and Systems
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    • v.6 no.9
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    • pp.836-843
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    • 2000
  • A sequence planning method is proposed to reduce the assembly time of gantey-type chip mounters with single head. The overall path of the chip mounter is divided into forward and backward path, and formulate the optimization problem is formulated as an transpoetation problem and an Euler's tour problem. The transportation alforithm is applied to find optimal backward path, and Euler's tour algorithm used to generate an assembly sequence. Simulation results are presented to verify the usefulness of the proposed method.

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Single-Chip Controller Design for Piezoelectric Actuators using FPGA (FPGA를 이용한 압전소자 작동기용 단일칩 제어기 설계)

  • Yoon, Min-Ho;Park, Jungkeun;Kang, Taesam
    • Journal of Institute of Control, Robotics and Systems
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    • v.22 no.7
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    • pp.513-518
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    • 2016
  • The piezoelectric actuating device is known for its large power density and simple structure. It can generate a larger force than a conventional actuator and has also wide bandwidth with fast response in a compact size. To control the piezoelectric actuator, we need an analog signal conditioning circuit as well as digital microcontrollers. Conventional microcontrollers are not equipped with an analog part and need digital-to-analog converters, which makes the system bulky compared with the small size of piezoelectric devices. To overcome these weaknesses, we are developing a single-chip controller that can handle analog and digital signals simultaneously using mixed-signal FPGA technology. This gives more flexibility than traditional fixed-function microcontrollers, and the control speed can be increased greatly due to the parallel processing characteristics of the FPGA. In this paper, we developed a floating-point multiplier, PWM generator, 80-kHz power control loop, and 1-kHz position feedback control loop using a single mixed-signal FPGA. It takes only 50 ns for single floating-point multiplication. The PWM generator gives two outputs to control the charging and discharging of the high-voltage output capacitor. Through experimentation and simulation, it is demonstrated that the designed control loops work properly in a real environment.

SNP: A New On-Chip Communication Protocol for SoC (SNP : 시스템 온 칩을 위한 새로운 통신 프로토콜)

  • Lee Jaesung;Lee Hyuk-Jae;Lee Chanho
    • Journal of KIISE:Computer Systems and Theory
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    • v.32 no.9
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    • pp.465-474
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    • 2005
  • For high density SoC design, on-chip communication based on bus interconnection encounters bandwidth limitation while an NoC(Network-on-Chip) approach suffers from unacceptable complexity in its Implementation. This paper introduces a new on-chip communication protocol, SNP (SoC Network Protocol) to overcome these problems. In SNP, conventional on-chip bus signals are categorized into three groups, control, address, and data and only one set of wires is used to transmit all three groups of signals, resulting in the dramatic decrease of the number of wires. SNP efficiently supports master-master communication as well as master-slave communication with symmetric channels. A sequencing rule of signal groups is defined as a part of SNP specification and a phase-restoration feature is proposed to avoid redundant signals transmitted repeatedly over back-to-back transactions. Simulation results show that SNP provides about the same bandwidth with only $54\%$ of wires when compared with AMBA AHB.

Studies on Physical Properties of Wood-based Composite Panel with Recycled Tire Chip - Change of Properties on Composite Panel by Mixing Ratio of Combined Materials - (폐타이어를 이용한 목질고무 복합패널의 물성에 관한 연구 - 원료혼합비율에 따른 복합패널의 재질변화 -)

  • Lee, Weon-Hee;Byeon, Hee-Seop;Bae, Hyun-Mi
    • Journal of the Korean Wood Science and Technology
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    • v.26 no.1
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    • pp.70-75
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    • 1998
  • In this paper, the relationships between volumetric mixing ratio of rubber chip and physical and mechanical properties of wood/rubber composite panel was examined in order to investigate the mixture characteristics of wood and rubber chip. Because of the specific gravity of rubber differed from wood chip, physical properties of wood/rubber composite panel was shown very different values by mixing rate of chip element. Specific gravity in air-dry of composite panel was increased rapidly as volumetric percent of rubber chip was increased. Moisture content of composite panel was decreased as volumetric percent of rubber chip element was increased. This results was considered that wood weight is light and porosity material for moisture absorption. Compressive strength and modulus of rupture in bending test were decreased as volumetric percent of rubber chip increased. By mixing ratio control of chip elements, various wood/rubber composite panel can be applicable to every interior materials such as subfloor, playground, and exterior materials such as road blocks for recreational facilities in garden and forest and city parks.

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8.2-GHz band radar RFICs for an 8 × 8 phased-array FMCW receiver developed with 65-nm CMOS technology

  • Han, Seon-Ho;Koo, Bon-Tae
    • ETRI Journal
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    • v.42 no.6
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    • pp.943-950
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    • 2020
  • We propose 8.2-GHz band radar RFICs for an 8 × 8 phased-array frequency-modulated continuous-wave receiver developed using 65-nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low-noise amplifier phase-shifter (LNA-PS) chips and a 4ch RX front-end chip. The LNA-PS chip has a novel phase-shifter circuit for low-voltage operation, novel active single-to-differential/differential-to-single circuits, and a current-mode combiner to utilize a small area. The LNA-PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single-channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6-bit phase states with a 0.35° RMS phase error. The input P1 dB of the chip is approximately -27.5 dBm at high gain and is enough to cover the highest input power from the TX-to-RX leakage in the radar system. The gain range of the 4ch RX front-end chip is 9 dB to 30 dB per channel. The LNA-PS chip consumes 82 mA, and the 4ch RX front-end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA-PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

Nanoscale Fabrication of Biomolecular Layer and Its Application to Biodevices

  • Park, Jeong-Woo;Nam, Yun-Suk;Masamichi Fujihira
    • Biotechnology and Bioprocess Engineering:BBE
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    • v.9 no.2
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    • pp.76-85
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    • 2004
  • Biodevices composed of biomolecular layer have been developed in various fields such as medical diagnosis, pharmaceutical screening, electronic device, photonic device, environmental pollution detection device, and etc. The biomolecules such as protein, DNA and pigment, and cells have been used to construct the biodevices such as biomolecular diode, biostorage device, bioelectroluminescence device, protein chip, DNA chip, and cell chip. Substantial interest has focused upon thin film fabrication or the formation of biomaterials mono- or multi-layers on the solid surfaces to construct the biodevices. Based on the development of nanotechnology, nanoscale fabrication technology for biofilm has been emerged and applied to biodevices due to the various advantages such as high density immobilization and orientation control of immoblized biomolecules. This review described the nanoscale fabrication of biomolecular film and its application to bioelectronic devices and biochips.

Chip Formation of Ceramic Tools in Metal Cutting (절삭가공에서 세라믹 공구의 칩형상에 관한 연구)

  • 노상래;안상욱
    • Journal of the Korean Ceramic Society
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    • v.31 no.11
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    • pp.1355-1361
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    • 1994
  • With the availability of ceramics (Al2O3, Al2O3-TiC), it is possible to machine very hard steel at different cutting conditions. When hardened steel STD 11 is turned using ceramic tools, chip formation is observed conical-herical and arc chips with a cyclic saw toothed type. The main cause of saw toothed chip formation is observed conical-herical and arc chips with a cyclic saw toothed type. The main cause of saw toothed chip formation is found to be periodic gross shear fracture extending from the free surface of the chip toward the tool tip. In regard to chip control, ceramic Al2O3 is superior to the other cutting tools. The roughness of machined surface was getting worse with increasing of cutting speed and feed.

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