• Title/Summary/Keyword: chip bonding

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Viscoelastic Analysis for Behavior of Edge Cracks at the Bonding Interface of Semiconductor Chip (반도체 칩 접착 계면에 존재하는 모서리 균열 거동에 대한 점탄성 해석)

  • 이상순
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.14 no.3
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    • pp.309-315
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    • 2001

  • The Stress intensity factors for edge cracks located at the bonding interface between the elastic semiconductor chip and the viscoelastic adhesive layer have been investigated. Such cracks might be generated due to stress singularity in the vicinity of the free surface. The domain boundary element method(BEM) has been employed to investigate the behavior of interface stresses. The overall stress intensity factor for the case of a small interfacial edge crack has been computed. The magnitude of stress intensity factors decrease with time due to viscoelastic relaxation.

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Flip-Chip Package of Silicon Pressure Sensor Using Lead-Free Solder (무연솔더를 이용한 실리콘 압력센서의 플립칩 패키지)

  • Cho, Chan-Seob
    • Journal of the Korean Society of Industry Convergence
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    • v.12 no.4
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    • pp.215-219
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    • 2009

  • A packaging technology based on flip-chip bonding and Pb-free solder for silicon pressure sensors on printed circuit board (PCB) is presented. First, the bump formation process was conducted by Pb-free solder. Ag-Sn-Cu solder and the pressed-screen printing method were used to fabricate solder bumps. The fabricated solder bumps had $189-223{\mu}m$ width, $120-160{\mu}m$ thickness, and 5.4-6.9 standard deviation. Also, shear tests was conducted to measure the bump shear strength by a Dage 2400 PC shear tester; the average shear strength was 74 g at 0.125 mm/s of test speed and $5{\mu}m$ shear height. Then, silicon pressure sensor packaging was implemented using the Pb-free solder and bump formation process. The characteristics of the pressure sensor were analogous to the results obtained when the pressure sensor dice are assembled and packaged using the standard wire-bonding technique.

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Laser-Assisted Bonding Technology for Interconnections of Multidimensional Heterogeneous Devices (다차원 이종 복합 디바이스 인터커넥션 기술 - 레이저 기반 접합 기술)

  • Choi, K.S.;Moon, S.H.;Eom, Y.S.
    • Electronics and Telecommunications Trends
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    • v.33 no.6
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    • pp.50-57
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    • 2018

  • As devices have evolved, traditional flip chip bonding and recently commercialized thermocompression bonding techniques have been limited. Laser-assisted bonding is attracting attention as a technology that satisfies both the requirements of mass production and the yield enhancement of advanced packaging interconnections, which are weak points of these bonding technologies. The laser-assisted bonding technique can be applied not only to a two-dimensional bonding but also to a three-dimensional stacked structure, and can be applied to various types of device bonding such as electronic devices; display devices, e.g., LEDs; and sensors.

  • https://doi.org/10.22648/ETRI.2018.J.330606 인용 PDF HTML

Thermal Compression of Copper-to-Copper Direct Bonding by Copper films Electrodeposited at Low Temperature and High Current Density (저온 및 고전류밀도 조건에서 전기도금된 구리 박막 간의 열-압착 직접 접합)

  • Lee, Chae-Rin;Lee, Jin-Hyeon;Park, Gi-Mun;Yu, Bong-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2018.06a
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    • pp.102-102
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    • 2018

  • Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

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