• Journal of electromagnetic engineering and science
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• v.18 no.1
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• pp.20-28
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• 2018

The time synchronization of each sub-unit of a pulsed generator is important to generate an output high-power radio frequency (RF) signal. To obtain the time synchronization between an input RF signal fed by an external source and an electron beam produced by an electric pulse generator, the influence of different charging voltages on a delay and a rise time of the output pulse waveform in the electric pulse generator should be carefully considered. This paper aims to study the timing characteristics of the delay and the rise time as a function of different charging voltages with a peak value of less than -35 kV in the high-voltage pulse generator, including a trigger generator (TG) and a pulse-forming line (PFL). The simulation has been carried out to estimate characteristics in the time domain, in addition to their output high-voltage amplitude. Experimental results compared with those obtained by simulation indicate that the delay of the output pulses of the TG and PFL, which are made by controlling the external triggering signal with respect to different charging voltages, is getting longer as the charging voltage is increasing, and their rise times are inversely proportional to the amplitude of the charging voltage.

• Journal of information and communication convergence engineering
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• v.8 no.1
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• pp.103-106
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• 2010

In this paper, the delay times were evaluated to develop highly reliable time-to-digital converter(TDC) in analog and digital delay element structures. The delay element can be designed by using current source or inverter. In case of using inverter, the number of inverter has to be controlled to adjust the delay time. And in case of using current source, the current for charging and discharging is controlled. When the current source is used the delay time of the delay element is not sensitive with varying the channel width of CMOS. However, when the inverter is used the delay time is directly related to the channel width of CMOS. Therefore to obtain good reliability in TDC circuit the delay element using current source is more stable compared to inverter in the viewpoint of the variation of fabrication process.

• Progress in Superconductivity and Cryogenics
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• v.22 no.3
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• pp.13-19
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• 2020

This study presents the experiment and simulation results on the magnetic field response and electrical stability behaviors of no-insulation (NI) and metal insulation with stainless steel tape (MI-SS) which wound in form of racetrack type coils. First of all, the structural design of the racetrack type bobbin was shown along with its parameters. Then, the current-voltage tests were carried out to measure the critical current of both test coils. Also, the sudden discharging and charging tests were performed in the steady state to estimate the decay field time and magnetic field response, respectively. Finally, the overcurrent tests were conducted in the transient state to investigate the electrical stability of these test coils. Based on the experimental results, the contact surface resistances were calculated and applied to the field coils (FCs) of 10-MW-class second generation high temperature superconducting generator (2G HTSG) used in wind offshore environment. The charging delay time and electrical stability for NI and MI-SS HTS FCs of 10-MW-class 2G HTSG are analyzed by the equivalent circuit model and the key parameters which were obtained from the electromagnetic finite element analysis results.

• KEPCO Journal on Electric Power and Energy
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• v.6 no.1
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• pp.59-64
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• 2020

Scheduling of electric vehicles and optimizing for charging waiting time have been critical. Meanwhile, it is challengeable to exploit the fluctuating data from electric vehicles in real-time. We introduce an optimal routing algorithm and a simulator with electric vehicles obeying the Poisson distribution of the observed information about time, space and energy-demand. Electric vehicle routing is updated in every cycle even it is already set. Also, we suggest an electric vehicle routing algorithm for minimizing total trip time, considering a threshold of the waiting time. Total trip time and charging waiting time are decreased 34.3% and 86.4% respectively, compared to the previous algorithm. It can be applied to the information service of charging stations and utilized as a reservation service.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.1
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• pp.91-97
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• 2021

ISO/IEC 15118 is an international communication standard for EV(electric vehicle)'s V2G implementation. In the charging/discharging control of an EV based on a communication protocol, there is inevitably a time delay when charging/discharging occurs, and the delay may limit in supplying power flexibility. In this paper, we implemented an ISO/IEC 15118-based V2G emulator and measured the charge/discharge response characteristics. As a result, the time delay appeared as 0.12ms. Accordingly, the power flexibility markets that EV can participate in under the current standard were explored.

• Journal of the Korean Institute of Intelligent Systems
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• v.27 no.1
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• pp.1-6
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• 2017

Recent researches on radio frequency energy harvesting networks(RF-EHNs) with limited energy resource like battery have been focusing on the development of a new scheme that can effectively extend the whole lifetime of a network to semipermanent. In order for considerable increase both in the amount of energy obtained from radio frequency energy harvesting and its charging effectiveness, it is very important to design a network that supports energy harvesting and data transfer simultaneously with the full consideration of various characteristics affecting the performance of a RF-EHN. In this paper, we proposes an interference-based charging aware routing protocol(ICARP) that utilizes interference information and charging time to maximize the amount of energy harvesting and to minimize the end-to-end delay from a source to the given destination node. To accomplish the research objectives, this paper gives a design of ICARP adopting new network metrics such as interference information and charging time to minimize end-to-end delay in energy harvesting wireless networks. The proposed method enables a RF-EHN to reduce the number of packet losses and retransmissions significantly for better energy consumption. Finally, simulation results show that the network performance in the aspects of packet transmission rate and end-to-end delay has enhanced with the comparison of existing routing protocols.

• Journal of KIISE
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• v.42 no.12
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• pp.1495-1502
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• 2015

Data compression involves a trade-off between delay time and data size. Greater delay times require smaller data sizes and vice versa. There have been many studies performed in the field of wireless sensor networks on increasing network life cycle durations by reducing data size to minimize energy consumption; however, reductions in data size result in increases of delay time due to the added processing time required for data compression. Meanwhile, as energy generation occurs periodically in solar energy-based wireless sensor networks, redundant energy is often generated in amounts sufficient to run a node. In this study, this excess energy is used to reduce the delay time between nodes in a sensor network consisting of solar energy-based nodes. The energy threshold value is determined by a formula based on the residual energy and charging speed. Nodes with residual energy below the threshold transfer data compressed to reduce energy consumption, and nodes with residual energy above the threshold transfer data without compression to reduce the delay time between nodes. Simulation based performance verifications show that the technique proposed in this study exhibits optimal performance in terms of both energy and delay time compared with traditional methods.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.5
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• pp.769-776
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• 2023

In this paper, we designed an MLSA(Match-line Sense Amplifier) for low-power CAM(Content Addressable Memory). By using the MLSA and precharge controller, we reduced power consumption during CAM operation by employing a selective match-line charging technique to mitigate power consumption caused by mismatch. Additionally, we further reduced power consumption due to leakage current by terminating precharge early when a mismatch occurs during the search operation. The designed circuit exhibited superior performance compared to the existing circuits, with a reduction of 6.92% and 23.30% in power consumption and propagation delay time, respectively. Moreover, it demonstrated a significant decrease of 29.92% and 52.31% in product-delay-product (PDP) and energy-delay-product (EDP). The proposed circuit was validated using SPECTRE simulation with TSMC 65nm CMOS process.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1247-1249
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• 2009

We have successfully developed the 22 inch WSXGA+ DLS(Data Line Sharing) Panel driving in 75 Hz. In the large size and high resolution panels, it is very difficult to design the DLS Panels without failure because of the very short charging time and the large signal delay. So, we first investigated the charging order to find the most adequate charging type to the large size and high resolution panels. And then, we optimized the design of DLS in terms of improving the charging properties using the technologies of the Delta-doping TFTs, Cu metal electrodes and optimization of panel design value and the circuit signal timing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.137-140
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• 1998

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate si후미 distortion and pixel charging capability. which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio and level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.