• Proceedings of the Korean Society of Sericultural Science Conference
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• 2001.10a
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• pp.41-41
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• 2001

no Abstract, See Full Text

• Journal of information and communication convergence engineering
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• v.6 no.4
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• pp.376-382
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• 2008

Developing highly cost-efficient and reliable embedded systems demands hardware/software co-design and co-simulation due to fast TTM and verification issues. So, it is essential that Platform-Based SoC design methodology be used for enhanced reusability. This paper addresses a reusable SoC platform based on OpenCores soft processor with reconfigurable architectures for hardware/software codesign methodology. The platform includes a OpenRISC microprocessor, some basic peripherals and WISHBONE bus and it uses the set of development environment including compiler, assembler, and debugger. The platform is very flexible due to easy configuration through a system configuration file and is reliable because all designed SoC and IPs are verified in the various test environments. Also the platform is prototyped using the Xilinx Spartan3 FPGA development board and is implemented to a single chip using the Magnachip cell library based on $0.18{\mu}m$ 1-poly 6-metal technology.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.32 no.1
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• pp.62-69
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• 2008

A post-processing program based on the OOP(Object-Oriented Programming) concept has been developed for flow visualization of the flow analysis code(PowerCFD) using unstructured cell-centered method. User-friendly GUI(GTaphic User Interface) has been built on the base of MFC(Microsoft Foundation Class). The program is organized as modules by classes including those based on VTK(Visualization ToolKit)-library, and these classes are made to function through inheritance and cooperation which is an important and valuable OOP concept. The major functions of this post-processor program are introduced and demonstrated, which include mesh plot, contour plot, vector plot, surface plots, cut plot, clip plot, xy-plot and streamline plot as well as view manipulation (translation, rotation, scaling etc).

• Transactions of the Korean Society of Mechanical Engineers B
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• v.32 no.1
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• pp.70-77
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• 2008

A pre-processing program based on the OOP(object-oriented programming) concept has been developed. The program consists of the input of a 2D or 3D flow problem to a CFD program by means of an user-friendly interface and the subsequent transformation of this input into a form suitable for the solver(PowerCFD) using unstructured cell-centered method. User-friendly GUI(graphic user interface) has been built on the base of MFC(Microsoft Foundation Class). The program is organized as modules by classes based on VTK(Visualization ToolKit)-library, and these classes are made to function through inheritance and cooperation which is an important and valuable concept of object-oriented programming. The major functions of this program are introduced and demonstrated, which include mesh generation, boundary settings, solver settings, generation of grid connectivity and geometric data etc.

• Journal of the Korean Wood Science and Technology
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• v.46 no.6
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• pp.692-702
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• 2018

Streptococcus mutans causes oral diseases, including tooth decay, by producing a biofilm called plaque. Therefore, inhibition of biofilm formation is essential for maintaining oral health. Plants produce a variety of secondary metabolites, which act as starting sources for the discovery of new bioactive chemicals that inhibit biofilm formation of S. mutans. Previous studies have reported on chemicals with antibiotic activity for the inhibition of biofilm formation by S. mutans. In this study, nine plant extracts from Melonis Pedicellus, Agastachis Herba, Mori Cortex Radicis, Diospyros kaki leaves, Agrimoniae Herba, Polygoni Multiflori Radix, Lycopi Herba, Elsholtziae Herba, and Schizonepetae Spica were screened for the inhibition of biofilm formation from a plant extract library. The water-soluble compounds of the extracts did not affect cell growth but selectively inhibited biofilm formation. These results suggest that the selected plant extracts constitute novel biofilm formation inhibitors, with a novel biological mechanism, for improving oral hygiene.

• The Journal of the Acoustical Society of Korea
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• v.12 no.1
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• pp.27-36
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• 1993

FM방식의 악기음원합성은 해당 악기의 음색과 음정에 맞는 FM의 기본 주파수와 변조 계수를 정하여 신호 파형을 생성하는 것으로, 다른 가, 감산방식 또는 PCM방식 등에 비해 비교적 간단한 구조로 다양한 악기음원합성이 가능하다. 따라서 현재 사용되고 있는 개인용 컴퓨터에 부착되는 사운드합성 카드에는 FM방식 음원합성기술이 적용되고 있다. 본 논문에서는 FM방식 음원합성기술을 이용하여 실시간 악기음원합성이 가능한 논리회로를 설계하는데 관한 연구를 기술한다. 본 연구에서는 소프트웨어 프로그래밍에 의해 FM방식 음원합성기의 구조를 설계하고 주요 블록의 최적 변수 값을 실험하였다. 논리회로 설계 및 회로검증은 향후 주문형반도체(ASIC:Application Specific Integrated Circuit)제작을 위해 기존의 표준셀 라이브러리와 주문형반도체 전용 설계시스템을 사용하였다. 회로검증 결과는 간이 평가보드를 제작하고 PC와 접속시켜 생성된 악기음을 직접듣는 주관적 평가방법으로 최종 확인하였다.

• Proceedings of the PSK Conference
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• 2003.04a
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• pp.300.3-301
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• 2003

The activation of the hepatic stellate cell (HSC) is a key step in liver fibrogenesis. Utilizing large scale sequencing of a 3' -directed cDNA library, we investigated expression profiles of quiescent and activated rat HSCs. During the activation process, O-acetyl disialoganglioside synthase (OAcGD3S) was identified as one of the significant upregulated factors. Upregulation of OAcGD3S in cultured HSCs was confirmed by both northern and western blot analyses. (omitted)

• ETRI Journal
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• v.25 no.5
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• pp.315-320
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• 2003

Elliptic curve cryptography (ECC) offers the highest security per bit among the known public key cryptosystems. The operation of ECC is based on the arithmetic of the finite field. This paper presents the design of a 193-bit finite field multiplier and an inversion unit based on a normal basis representation in which the inversion and the square operation units are easy to implement. This scalable multiplier can be constructed in a variable structure depending on the performance area trade-off. We implement it using Verilog HDL and a 0.35 ${\mu}m$ CMOS cell library and verify the operation by simulation.

• International Journal of Internet, Broadcasting and Communication
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• v.5 no.2
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• pp.11-14
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• 2013

This paper describes the sigma-delta ADC/DAC digital block with two channels. The ADC block has comb filter and three half band filters. And the DAC block has 5th Cascaded-of-Integrators Feedback DSM. The ADC and DAC support I2S, RJ, LJ and selectable input data modes of 24bit, 20bit, and 16bit. It is fabricated with 0.35um Hynix standard CMOS cell library. The chip size is 3700*3700um. It has been verified using NC Verilog Simulator and Matlab Tool.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.24-33
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• 2012

This paper describes a multi-mode LDPC decoder which supports 19 block lengths and 6 code rates of Quasi-Cyclic LDPC code for Mobile WiMAX system. To achieve an efficient implementation of 114 operation modes, some design optimizations are considered including block-serial layered decoding scheme, a memory reduction technique based on the min-sum decoding algorithm and a novel method for generating the cyclic shift values of parity check matrix. From fixed-point simulations, decoding performance and optimal hardware parameters are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 380,000 gates and 52,992 bits RAM, and the estimated throughput is about 164 ~ 222 Mbps at 56 MHz@1.8 V.