• Title/Summary/Keyword: cascaded control method

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A Zero Sequence Voltage Injection Method for Cascaded H-bridge D-STATCOM

  • Yarlagadda, Srinivasa Rao;Pathak, Mukesh Kumar
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.1088-1096
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    • 2017
  • Load variations on a distribution line result in voltage fluctuations at the point of common coupling (PCC). In order to keep the magnitude of the PCC voltage constant at its rated value and obtain zero voltage regulation (ZVR), a D-STATCOM is installed for voltage correction. Moreover, the ZVR mode of a D-STATCOM can also be used to balance the source current during unbalanced loading. For medium voltage and high power applications, a D-STATCOM is realized by the cascaded H-bridge topology. In the ZVR mode, the D-STATCOM may draw unbalanced current and in this process is required to handle different phase powers leading to deviations in the cluster voltages. Zero sequence voltage needs to be injected for ZVR mode, which creates circulating power among the phases of the D-STATCOM. The computed zero sequence voltage and the individual DC capacitor balancing controller help the DC cluster voltage follow the reference voltage. The effectiveness of the control scheme is verified by modeling the system in MATLAB/SIMULINK. The obtained simulations are further validated by the experimental results using a dSPACE DS1106 and five-level D-STATCOM experimental set up.

Quick Diagnosis of Short Circuit Faults in Cascaded H-Bridge Multilevel Inverters using FPGA

  • Ouni, Saeed;Zolghadri, Mohammad Reza;Rodriguez, Jose;Shahbazi, Mahmoud;Oraee, Hashem;Lezana, Pablo;Schmeisser, Andres Ulloa
    • Journal of Power Electronics
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    • v.17 no.1
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    • pp.56-66
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    • 2017
  • Fast and accurate fault detection is the primary step and one of the most important tasks in fault tolerant converters. In this paper, a fast and simple method is proposed to detect and diagnosis the faulty cell in a cascaded H-bridge multilevel inverter under a short circuit fault. In this method, the reference voltage is calculated using switching control pulses and DC-Link voltages. The comparison result of the output voltage and the reference voltage is used in conjunction with active cell pulses to detect the faulty cell. To achieve this goal, the cell which is active when the Fault signal turns to "0" is detected as the faulty cell. Furthermore, consideration of generating the active cell pulses is completely described. Since the main advantage of this method is its simplicity, it can be easily implemented in a programmable digital device. Experimental results obtained with an 11-level inverter prototype confirm the effectiveness of the proposed fault detection technique. In addition, they show that the diagnosis method is unaffected by variations of the modulation index.

Implementation of Multilevel Boost DC-Link Cascade based Reversing Voltage Inverter for Low THD Operation

  • Rao, S. Nagaraja;Kumar, D.V. Ashok;Babu, Ch. Sai
    • Journal of Electrical Engineering and Technology
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    • v.13 no.4
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    • pp.1528-1538
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    • 2018
  • In this paper, configuration of $1-{\phi}$ seven-level boost DC-link cascade based reversing voltage multilevel inverter (BDCLCRV MLI) is proposed for uninterrupted power supply (UPS) applications. It consists of three level boost converter, level generation unit and full bridge circuit for polarity generation. When compared with conventional boost cascaded H-bridge MLI configurations, the proposed system results in reduction of DC sources, reduced power switches and gate drive requirements. Inverter switching is accomplished by providing appropriate switching angles that is generated by any optimization switching angle techniques. Here, round modulation control (RMC) method is taken as the optimization method and switching angles are derived and the same is compared with various switching angles methods i.e., equal-phase (EP) method, and half-equal-phase (HEP) method which results in improved quality of obtained AC power with lowest total harmonic distortion (THD). Reduction in DC sources and switch count makes the system more cost effective. A simulation and prototype model of $1-{\phi}$ seven-level BDCLCRV MLI system is developed and its performance is analyzed for various operating conditions.

Pulse-Width Modulation Strategy for Common Mode Voltage Elimination with Reduced Common Mode Voltage Spikes in Multilevel Inverters with Extension to Over-Modulation Mode

  • Pham, Khoa-Dang;Nguyen, Nho-Van
    • Journal of Power Electronics
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    • v.19 no.3
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    • pp.727-743
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    • 2019
  • This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

Voltage Dip Compensation Algorithm Using Multi-Level Inverter (멀티레벨 인버터의 순간정전 보상알고리즘에 관한 연구)

  • Yun, Hong-Min;Kim, Yong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.27 no.12
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    • pp.133-140
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    • 2013
  • Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.

Enhancement of Cell Voltage Balancing Control by Zero Sequence Current Injection in a Cascaded H-Bridge STATCOM (STATCOM에서 영상분 전류주입에 의한 셀간 전압평형화 제어의 향상)

  • Kwon, Byung-Ki;Jung, Seung-Ki;Kim, Tae-Hyeong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.4
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    • pp.321-329
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    • 2015
  • The static synchronous compensator (STATCOM) of cascaded H-bridge configuration accompanying multiple separate DC sides is inherently subject to the problem of uneven DC voltages. These DC voltages in one leg can be controlled by adjusting the AC-side output voltage of each cell inverter, which is proportional to the active power. However, when the phase current is extremely small, large AC-side voltage is required to generate the active power to balance the cell voltages. In this study, an alternative zero-sequence current injection method is proposed, which facilitates effective cell balancing controllers at no load, and has no effect on the power grid because the injected zero sequence current only flows within the STATCOM delta circuit. The performance of the proposed method is verified through simulation and experiments.

Design of a navigation system using GPS and dead-reckoning (GPS와 dead-reckoning을 이용한 항법시스템 설계)

  • Kim, Jin-Won;Jee, Gyu-In;Lee, Jang-Gyu;Lee, Young-Jae
    • Journal of Institute of Control, Robotics and Systems
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    • v.2 no.3
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    • pp.188-193
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    • 1996
  • In this paper, an integrated navigation system based on GPS(Global Positioning System) and Dead-Reckoning (DR) is designed. For the calibration of DR, a self-calibration method and a GPS-based calibration method are proposed. From the field-test results, it is shown that DR can be successfully calibrated by the two proposed calibration methods. Also, a cascaded filter approach and a mixed-measurement algorithm are employed for GPS/DR integration. By using the newly proposed mixed-measurement algorithm, it is shown in simulation that the position error becomes smaller than by using only DR even if the number of visible GPS satellites is less than 4.

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The Simplified PWM Method using Serial Communication in Cascaded H-Bridge Multilevel Inverter (직렬통신을 이용한 H-브릿지 멀티레벨 인버터의 PWM 구현방법)

  • Park Young-Min;Ryu Han-Seong;Lee Hyun-Won;Lee Se-Hyun;Lee Chung-Dong;Yoo Jl-Yoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.6
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    • pp.620-627
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    • 2004
  • As h-bridge multilevel inverter is connected with series of single phase power cell, so it obtain high voltage using low voltage power semi-conductor and output voltage similar to sine wave. In this topology, the number of power cell increases in proportion to the output voltage level. Therefore, there are drawbacks that are responsibility against operating ability of main controller and signal wire increase. However, we can overcome this problems by the substitution of serial communication for the PWM signal in power cell control. Additionally, it has merits of reliability and maintenance. This paper deals with the synchronization and phase-shift method of power cell PWM using CAN(Controller Area Network) communication interrupt in H-bridge multilevel inverter. The advantages of proposed method are signal-line simplification using serial communication between main controller and cell controller, burden reduction in main controller, modularization of power cell, easy protection of each power cell, expandability improvement and reliability increase of control signal and power cell. This paper establishes propriety and reliability of proposed method through experiment of 13-level H-bridge multilevel inverter.

Study of bidirectional DCDC converter to prevent circulating current between battery packs (배터리 팩 간의 순환전류 방지를 위한 양방향 DCDC 컨버터 연구)

  • Lee, Seunghyun;Joo, Sungjun
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.695-703
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    • 2019
  • In this paper, we propose a method to remove the circulating current which can occur in the parallel connection of the high voltage series connected battery module in the battery pack. The removal way is a method of inserting a module named VVSM (Variable Voltage Variable Module) using bidirectional DCDC converter and supercapacitor in place of one or some of the cascaded battery cells in the battery pack configuration. In this module, it operates like a battery cell that can be controlled at a desired voltage. VVSM is used to match the voltages of the cascaded battery modules very easily. To demonstrate the proposed method, a PSIM simulation for battery model is used. In addition, the module with only the battery cell connected in series and the module with the proposed VVSM are made, and the two modules were connected in parallel to measure the circulating current between the two modules. As a result, it was verified that the proposed method effectively suppressed the circulating current.

Development of 80kW Bi-directional Hybrid-SiC Boost-Buck Converter using Droop Control in DC Nano-grid (DC 나노그리드에서 Droop제어를 적용한 80kW급 양방향 하이브리드-SiC 부스트-벅 컨버터 개발)

  • Kim, Yeon-Woo;Kwon, Min-Ho;Park, Sung-Youl;Kim, Min-Kook;Yang, Dae-Ki;Choi, Se-Wan;Oh, Seong-Jin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.4
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    • pp.360-368
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    • 2017
  • This paper proposes the 80-kW high-efficiency bidirectional hybrid SiC boost/buck converter using droop control for DC nano-grid. The proposed converter consists of four 20-kW modules to achieve fault tolerance, ease of thermal management, and reduced component stress. Each module is constructed as a cascaded structure of the two basic bi-directional converters, namely, interleaved boost and buck converters. A six-pack hybrid SiC intelligent power module (IPM) suitable for the proposed cascaded structure is adopted for high-efficiency and compactness. The proposed converter with hybrid switching method reduces the switching loss by minimizing switching of insulated gate bipolar transistor (IGBT). Each module control achieves smooth transfer from buck to boost operation and vice versa, since current controller switchover is not necessary. Furthermore, the proposed parallel control using DC droop with secondary control, enhances the current sharing accuracy while well regulating the DC bus voltage. A 20-kW prototype of the proposed converter has been developed and verified with experiments and indicates a 99.3% maximum efficiency and 98.8% rated efficiency.