• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.265-275
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• 2010

In this work, reliable methodology for device design is presented. Based on this method, the underlap length has been optimized for minimizing the gateinduced drain leakage (GIDL) in a 22-nm node 4-terminal (4-T) silicon-on-insulator (SOI) fin-shaped field effect transistor (FinFET) by TCAD simulation. In order to examine the effects of underlap length on GIDL more realistically, doping profile of the source and drain (S/D) junctions, carrier lifetimes, and the parameters for a band-to-band tunneling (BTBT) model have been experimentally extracted from the devices of 90-nm channel length as well as pnjunction test element groups (TEGs). It was confirmed that the underlap length should be near 15 nm to suppress GIDL effectively for reliable low standby power (LSTP) operation.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.243-243
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• 2010

Low-temperature grown (LTG) InGaAs epilayers were grown by MBE technique for studying a correlation between terahertz (THz) emission and the intrinsic defects. The 1.2-um-thick Be-compensated LTG-InGaAs epilayers were prepared on SI-InP:Fe substrate at $200-250^{\circ}C$, and subsequently in-situ annealed under As environment at $550^{\circ}C$ for 5-30 minutes. The carrier concentration/mobility and the crystalline structure were analyzed by the Hall effect and the x-ray diffraction (XRD), respectively, and the carrier lifetime were determined by the fs time-resolved pump-probe spectroscopy. THz generation from LTG-InGaAs was carried out by a Ti-sapphire laser (800 nm) of a pulse width of 190 fs at a repetition of 76 MHz. Figure shows the spectral amplitude of generated waves in the THz region. As the growth temperature of epilayer increases, the amplitude is enhanced. However, two samples grown at $200^{\circ}C$, as-grown and annealed, show almost no difference in the spectral amplitude. This suggests that the growth temperature is critical in the formation of defect states involved in THz emission. We are now investigating the correlations between the XRD band attributed to defects, the Hall parameter, and the spectral amplitude of generated THz wave.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.495-502
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• 2014

Fast recovery diodes (FRDs) were developed using the $p^{{+}{+}}/n^-/n^{{+}{+}}$ epitaxial layers grown by low temperature epitaxy technology. We investigated the effect of electrostatic discharge (ESD) stresses on their electrical and switching properties using current-voltage (I-V) and reverse recovery time analyses. The FRDs presented a high breakdown voltage, >450 V, and a low reverse leakage current, < $10^{-9}$ A. From the temperature dependence of thermal activation energy, the reverse leakage current was dominated by thermal generation-recombination and diffusion, respectively, at low and high temperature regions. By virtue of the abrupt junction and the Pt drive-in for the controlling of carrier lifetime, the soft reverse recovery behavior could be obtained along with a well-controlled reverse recovery time of 21.12 ns. The FRDs exhibited excellent ESD robustness with negligible degradations in the I-V and the reverse recovery characteristics up to ${\pm}5.5$ kV of HBM and ${\pm}3.5$ kV of IEC61000-4-2 shocks. Likewise, transmission line pulse (TLP) analysis reveals that the FRDs can handle the maximum peak pulse current, $I_{pp,max}$, up to 30 A in the forward mode and down to - 24 A in the reverse mode. The robust ESD property can improve the long term reliability of various power applications such as automobile and switching mode power supply.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.292-295
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• 2004

The SIT was introduced by Nishizawa. in 1972. When compared with high-voltage, power bipolar junction transistors, SITs have several advantages as power switching devices. They have a higher input impedance than do bipolar transistors and a negative temperature coefficient for the drain current that prevents thermal runaway, thus allowing the coupling of many devices in parallel to increase the current handling capability. Furthermore, the SIT is majority carrier device with a higher inherent switching speed because of the absence of minority carrier recombination, which limits the speed of bipolar transistors. This also eliminates the stringent lifetime control requirements that are essential during the fabrication of high-speed bipolar transistors. This results in a much larger safe operating area(SOA) in comparison to bipolar transistors. In this paper, vertical SIT structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. A trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. The proposed devices have superior electrical characteristics when compared to conventional device. Consequently, the fabrication of trench oxide power SIT with superior stability and electrical characteristics is simplified.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.380-380
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• 2010

Currently, organic light-emitting diodes (OLEDs) have been proven of their readiness for commercialization in terms of lifetime and efficiency. In accordance with emerging new technologies, enhancement of light efficiency and extension of application fields are required. Particularly inverted structures, in which electron injection occurs at bottom and hole injection on top, show crucial advantages due to their easy integration with Si-based driving circuits for active matrix OLED as well as large open area for brighter illumination. In order to get better performance and process reliability, usually a proper buffer layer for carrier injection is needed. In inverted top emission OLED, the buffer layer should protect underlying organic materials against destructive particles during the electrode deposition, in addition to increasing their efficiency by reducing carrier injection barrier. For hole injection layers, there are several requirements for the buffer layer, such as high transparency, high work function, and reasonable electrical conductivity. As a buffer material, a few kinds of transition metal oxides for inverted OLED applications have been successfully utilized aiming at efficient hole injection properties. Among them, we chose 2 nm of $WO_3$ between NPB [N,N'-bis(1-naphthyl)-N,N'-diphenyl-1,1'-biphenyl-4,4'-diamine] and Au (or Al) films. The interfacial energy-level alignment and chemical reaction as a function of film coverage have been measured by using in-situ ultraviolet and X-ray photoelectron spectroscopy. It turned out that the $WO_3$ interlayer substantially reduces the hole injection barrier irrespective of the kind of electrode metals. It also avoids direct chemical interaction between NPB and metal atoms. This observation clearly validates the use of $WO_3$ interlayer as hole injection for inverted OLED applications.

• FOCUS: LIFE SCIENCE
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• no.1
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• pp.2.1-2.6
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• 2024

This article provides detailed instructions for the correct installation, maintenance, and troubleshooting of capillary gas chromatography (GC) columns. It emphasizes the importance of proper installation to ensure optimal performance and longevity of the column. The document covers various aspects such as column trimming, installation, conditioning, testing, storage, and ferrule selection. The installation process involves ensuring that the heated zones of the GC are cool before placing the column cage in the column oven. It is essential to avoid sharp bends or stress on the capillary column during installation and to connect the front end of the column into the GC inlet at the recommended insertion distance. The document also provides guidance on trimming the column, including the use of a ceramic wafer or capillary column cutter to achieve a clean, burr-free cut. For previously used columns, it recommends removing any capillary caps, positioning the nut and ferrule, and trimming 1-2 cm from the column. After installation, the column should be purged with carrier gas to remove any oxygen and avoid oxidizing the column. Conditioning the column involves ramping to the upper isothermal temperature limit and maintaining this temperature for a specified duration. It is crucial to maintain carrier gas flow during conditioning and not exceed the upper temperature limit of the column to avoid phase damage. The document also discusses testing column performance using a suitable method and performing a test injection to assess performance. It provides recommendations for column storage, including flame-sealing the capillary ends or using retention gaps for long-term storage. Additionally, it emphasizes the importance of routine maintenance and replacement of GC consumables to extend the column's lifetime. Ferrule selection is another important aspect covered in the article, with a variety of ferrule materials available for different applications. The characteristics of common ferrule options are presented in a table, including temperature limits, reusability, and suitability for specific detector types.

• Journal of radiological science and technology
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• v.28 no.4
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• pp.267-272
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• 2005

The effects of As addition in amorphous selenium (a-Se) films for digital X-ray conversion material have been studied using the moving photocarrier grating (MPG) technique. This method utilizes the moving interference pattern generated by the superposition of the two frequency shifted laser beams for the illumination of the sample. This moving intensity grating induces a short circuit current, jsc in a-Se:As film. The transport parameters of the sample are extracted from the grating-velocity dependent short circuit current induced in the sample along the modulation direction. The electron and hole mobility, and recombination lifetime of a-Se films with arsenic (As) additions have been obtained. We have found an increase in hole drift mobility and recombination lifetime, especially when 0.3% As is added into a-Se film, whereas electron mobility decreases with As addition due to the defect density. The transport properties for As doped a-Se films obtained by using MPG technique have been compared with X-ray sensitivity for a-Se:As device. The fabricated a-Se(0.3% As) device film exhibited the highest X-ray sensitivity out of 5 samples.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.12
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• pp.1009-1014
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• 2012

Hydrogenated amorphous silicon (${\alpha}$-Si:H) layers deposited by plasma enhanced chemical vapor deposition (PECVD) are investigated for use in silicon hetero-junction solar cells employing n-type crystalline silicon (c-Si) substrates. The optical and structural properties of silicon hetero-junction devices have been characterized using spectroscopy ellipsometry and high resolution cross-sectional transmission electron micrograph (HRTEM). In addition, the effective carrier lifetime is measured by the quasi-steady-state photocoductance (QSSPC) method. We have studied on the correlation between the order of ${\alpha}$-Si:H and the passivation quality at the interface of ${\alpha}$-Si:H/c-Si. Base on the result, we have fabricated a silicon hetero-junction solar cell incorporating the ${\alpha}$-Si:H passivation layer with on open circuit voltage ($V_{oc}$) of 637 mV.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.438-438
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• 2009

We have investigated the effect of forming gas annealing for Upgraded Metallurgical Grade (UMG)-silicon solar cell in order to obtain low-cost high-efficiency cell using post deposition anneal at a relatively low temperature. We have observed that high concentration hydrogenation effectively passivated the defects and improved the minority carrier lifetime, series resistance and conversion efficiency. It can be attributed to significantly improved hydrogen-passivation in high concentration hydrogen process. This improvement can be explained by the enhanced passivation of silicon solar cell with antireflection layer due to hydrogen re-incorporation. The results of this experiment represent a promising guideline for improving the high-efficiency solar cells by introducing an easy and low cost process of post hydrogenation in optimized condition.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.93-93
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• 2009

실리콘 태양전지의 효율 향상을 위한 노력의 일환으로 결정질 실리콘 웨이퍼 표면passivation 물질 중 Atomic Layer Deposition (ALD)을 이용하여 증착한 $Al_2O_3$ 박막에 대한 관심이 증가하고 있다. 본 연구에서는 $Al_2O_3$ 박막의 증착 전 실리콘 웨이퍼의 산화막 두께에 따른 passivation 효과에 대해서 연구하였다. 실리콘 산화막은 $HNO_3$ 용액을 사용하여 화학적으로 생성시켰으며 $HNO_3$ 용액과의 반응 시간을 조절하여 실리콘 산화막의 두께를 조절하였다. 실리콘 산화막 생성 후 ALD로 $Al_2O_3$ 박막을 증착하였으며 증착 후 $N_2$ 분위기에서 annealing 하였다. Annealing 후 passivation 효과는 Quasi-Steady-State Photo Conductance를 사용하여 minority carrier의 lifetime을 측정하였다. Capacitance-Voltage measurement, Transmission Electron Microscopy, Ellipsometry를 사용하여 실리콘 산화막의 두께에 따른 $Al_2O_3$ 박막의 passivation 효과를 분석하였다.