• 한국전자통신학회논문지
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• 제9권8호
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• pp.847-852
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• 2014

반도체 소자 제조에서 비용 절감을 위한 공정기술의 스케일링 가속화 경향에 따라 축소기술에 대한 요구가 증가되고 있다. 축소에 따른 또 다른 가장 큰 문제점의 하나는 Hot Carrier Injection (HCI) 특성의 열화이다. 이는 축소 과정에서 생기는 불가피한 가장 큰 이슈중의 하나이며, 특히 입출력 소자에 있어 극복하기 어려운 부분이다. 이의 개선을 위해 유효 채널 길이를 늘이고자 LDD 임플란트 공정 이전에 산화막이 추가되었고, 또한 I/O LDD 임플란트 공정의 이온 입사 각도를 최적화함으로써, LDD 영역에서 E-field 열화 없이 HCI 규격을 만족할 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1956-1958
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• 1999

The analysis of hole injection efficiency at the p+/n-drift layer junction in non-punchthrough IGBT structure is presented. This analysis takes into account carrier concentration variations by conductivity modulation. Good agreement between this analysis and simulation is found over a wide range of carrier lifetime and current density. The proposed analytical model of the hole injection efficiency as a function of collector width, collector concentration has been verified by device simulator, ATLAS.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기물성,응용부문
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• pp.165-167
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• 2001

Emitter injection efficiency of p+/n-buffer Junction with Gaussian impurity distribution is presented. This model takes into account the variation of the carrier lifetime with injection level which allows a unified interpretation of the injection efficiency for all injection level. The injected carrier density and injection efficiency of the anode are calculated as a function of the current density with the low level lifetime as a parameter for different thicknesses of the anode. The analytical results agree well with simulation.

• 전자공학회논문지A
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• 제30A권12호
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• pp.77-87
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• 1993

PMOSFETs were studied on the effect of Hot-Carrier induced drain leakage current (Gate-Induced-Drain-Leakage). The result turned out that change in Vgl(drain voltage where 1pA/$\mu$m of drain leadage current flows) was largest in the Channel-Hot-Hole(CHH) injection condition and next was in dynamic stress and was smallest in electron trapping (Igmax) condition under various stress conditions. It was analyzed that if electron trapping occurrs in the overlap region of gate and drain(G/D), it reduces GIDL current due to increment of flat-band voltage(Vfb) and if CHH is injected, interface states(Nit) were generated and it increases GIDL current due to band-to-defect-tunneling(BTDT). Especially, under dynamic stress it was confirmed that increase in GIDL current will be high when electron injection was small and CHH injection was large. Therefore as applying to real circuit, low drain voltage GIDL(BTDT) was enhaced as large as CHH Region under various operating voltage, and it will affect the reliablity of the circuit.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 추계학술대회 논문집
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• pp.162-165
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• 2000

To investigate the effect of metal electrode in electroluminescent[EL] devices, we fabricated EL devices of ITO/P3HT/Al, ITO/P3HT/LiF/Al and ITO/P3HT/Mg:In structure. In current-voltage-light power characteristics, turn-on voltage of EL devices using LiF insulating layer and Mg:In(2.8V) metal electrode is lower than EL device using Al(4.2V). Besides the external quantum efficiency is improved also. The reason is related to carrier mobility and carrier injection, which would affect the hole-electron balance. In the device with Al electrode, holes injected from indium-tin-oxide[ITO] to poly(3-hexylthiophene)[P3HT] might reach the Al electrode without interacting with injected electrons, because the electron injection efficiency was very low for this electrode. Besides oxidation of the Al electrode is likely due to holes reaching the cathode without meeting injected electrons. Another possible reason for the higher EL efficiency may be the insulating layer playing the role of a tunneling barrier for holes to the Al electrode. In all EL devices, the orange-red light was clearly visible in a dark room. Maximum peak wavelength of EL spectrum emitted at 640nm in accordance with photon energy 1.9eV

• 대한전자공학회논문지
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• 제24권1호
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• pp.102-109
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• 1987

This study is carrier out to investigate the carrier injection and the characteristics of trapping for the CVD deposited Al2O3 film on Si substrates. Samples used are metal -Al2O3-Si Structure in which metal field plates are used with Aluminium or God. Canier injection and trapping, which result in flat band voltalge shift, occur at fields as low as 1~2 MV/cm. An approximate method is proposed for computing the location of the centroid of the trapped electrons in this paper. Results show that carriers are trapped near the injecting interface at fields less than about 5MV/cm. Because of continued charging, a steady state can not be reached. Therefore the unique I-V curve is obtained when the traps are initially empty. By utilization of applied voltage on each point of the fresh device sample, it is measured the I-V surves for two polarities of applied voltage. The current densities observed in the Al2O3 films are much larger than those obtained in SiO2.

• 한국인쇄학회지
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• 제11권1호
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• pp.103-122
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• 1993

A cause and counterplan of the increase in dark decay rate of$\varepsilon$-CuPc/PVCz photoreceptor which is consist of the carrier generation layer (CGL) of$\varepsilon$type copper phthalocyanine ($\varepsilon$-CuPc) thin film by an aqueous coating method and the carrier transport layer (CTL) of polyvinylcarbazol (PVCz) by spin coating, are studied in this paper. Electrochemical deposition of CGL was accompanied by an increase in work function of the aluminium substrate during the processes and the enhanced work function 5.3 eV rose above the ionization potential 5.16 eV of $\varepsilon$-CuPc. This resulted in the increased injection of holes from substrate into CGL and a fast dark decay rate. Improved photoreceptor, an electron-transport $\varepsilon$-CuPc/TNF photoreceptor, led to lowing of dark decay rate and increasing of photosensitivity. The carrier generation efficiency (ηg), carrier injection efficiency (ηi) and xerographic gain (G) of the $\varepsilon$-CuPc/TNF photoreceptor were obtained by XTOF method and PIDC.

• 한국전기전자재료학회논문지
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• 제21권8호
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• pp.687-694
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• 2008

This paper is focused on the improvement of MOS device reliability related to deuterium process. The injection of deuterium into the gate oxide film was achieved through two kind of method, high-pressure annealing and low-energy implantation at the back-end of line, for the purpose of the passivation of dangling bonds at $SiO_2/Si$ interface. Experimental results are presented for the degradation of 3-nm-thick gate oxide ($SiO_2$) under both negative-bias temperature instability (NBTI) and hot-carrier injection (HCI) stresses using P and NMOSFETs. Annealing process was rather difficult to control the concentration of deuterium. Because when the concentration of deuterium is redundant in gate oxide excess traps are generated and degrades the performance, we found annealing process did not show the improved characteristics in device reliability, compared to conventional process. However, deuterium ion implantation at the back-end process was effective method for the fabrication of the deuterated gate oxide. Device parameter variations under the electrical stresses depend on the deuterium concentration and are improved by low-energy deuterium implantation, compared to conventional process. Our result suggests the novel method to incorporate deuterium in the MOS structure for the reliability.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1561-1563
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• 2008

We report an optical second harmonic generation measurement that allows direct probing of dynamical carrier motion in organic field effect transistors. Carrier injection and transport process are discriminated. The mobility and contact resistance of pentacene FETs are determined from the visualized diffusion-like carrier motion.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권8호
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• pp.463-467
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• 2000

In this paper, the new LIGBT structures with trap injection are proposed to improve switching characteristics of the conventional SOI LIGBT. The Simulations are performed in order to investigate the effects of the positiion, whidth and concentration of trap injection region with a reduced minority carrier lifetime using 2D device simulator MEDICI. Their electrical characteristics are analyzed and the optimum design parameters are extracted. As a result of simulation, the turn off time for the model A with the trap injection is $0.78\mus$. These results indicate the improvement of about 2 times compared with the conventional SOI LIGBT because trap injection prevents minority carriers which is stored in the n-drift region during turn off switching. The latching current is $1.5\times10^{-4}A/\mum$ and forward blocking voltage is 168V which are superior to those of conventional structure. It is shown that the trap injection is very effective to reduce the turn off time with a little increasing of on-state voltage drop if its design and process parameters are optimized.