• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.429-429
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• 2010

TFT 제조 방법 중 LTPS (Low Temperature Polycrystalline Silicon)는 저온과 저비용 등의 이점으로 인하여 flat panel display 제작에 널리 사용된다. 이동도와 전류 점멸비 등에서 이점을 가지는 ELA(Excimer Laser Annealing)가 널리 사용되고 있지만, 이 방법은 uniformity 등의 문제점을 가지고 있다. 이를 극복하기 위한 방법으로 MICC(Metal Induced Capping Crystallization)이 사용되고 있다. 이 방법은 $SiN_x$, $SiO_2$, SiON등의 capping layer를 diffusion barrier로 위치시키고, Ni 등의 금속을 capping layer에 도핑 한 뒤, 다시 한번 열처리를 통하여 a-Si에 Ni을 확산시키킨다. a-Si 층에 도달한 Ni들이 seed로 작용하여 Grain size가 매우 큰 film을 제작할 수 있다. 채널의 grain size가 클 경우 grain boundary에 의한 캐리어 scattering을 줄일 수 있기 때문에 MIC 방법을 사용하였음에도 ELA에 버금가는 소자의 성능과 안정성을 얻을 수있었다. 본 연구에서는 large grain TFT의 Gate bias stress에 따른 소자의 안정성 측정 및 분석에 목표를 두었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.04b
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• pp.26-29
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• 2004

High density plasma fluorinated silicate glass (HDP FSG) is used as a gap fill film for metal-to-metal space because of many advantages. However, FSG films can cause critical problems such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. It is known that these problems are caused by fluorine penetration out of FSG film. To prevent it, FSG capping layers such like SRO (Silicon Rich Oxide) are needed. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated. Normal stress and High stress due to denser film. While heat treatment to PETEOS caused lower blocking against fluorine penetration, it had insignificant effect on SiN. Compared with other layers, SRO using ARC chamber and SiN were shown a better performance to block fluorine penetration.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.300-303
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• 2004

To fill the gap of films for metal-to-metal space High density plasma fluorinated silicate glass (HDP FSG) is used due to various advantages. However, FSG films can have critical drawbacks such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. These problems are generally caused by fluorine penetration out of FSG film. Hence, FSG capping layers such like SRO(Silicon Rich Oxide) are required to prevent flourine penetration. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated through FTIR analysis. FTIR graphs of both SRO using ARC chamber and SiN show that clear Si-H bonds at $2175{\sim}2300cm^{-1}$. Thus, Si-H bond at $2175{\sim}2300cm^{-1}$ of FSG capping layers lays a key role to block fluorine penetration as well as dangling bond.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.103-106
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• 1999

In this paper, we suggest the FED packaging technology that have 4mm thickness, using sodalime glass-to-sodalime glass electrostatic bonding. It based on conventional silicon-glass bonding. The silicon film was deposited an around the exhausting hole on FED backside panel. And then, the silicon film of panel was successfully bonded with capping(bare) glass in vacuum environment and the FED panel was vacuum-sealed. In this method, we could achieve more 153 times increased conductance and 200 times increased vacuum efficiency than conventional tube packaging method. The vacuum level in panel, by SRG test, was maintained about low 10$_{-4}$ Torr during above two months And, the light emission was observed to 0.7-inch tubeless packaged FED. Then anode current was 34 $\mu$ A. Emission stability was constantly measured for 10 days.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.4
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• pp.280-285
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• 2003

The influence of silicon surface damage on nickel-silicide (NiSi) has been characterized and H$_2$ anneal and TiN rapping has been applied to suppress the electrical, morphological deterioration phenomenon incurred by the surface damage. The substrate surface is intentionally damaged using Ar IBE (Ion beam etching) which can Precisely control the etch depth. The sheet resistance of NiSi increased about 18% by the surface damage, which is proven to be mainly due to the reduced silicide thickness. It is shown that simultaneous application of H: anneal and TiN capping layer is highly effective in suppressing the surface damage effect.

• Journal of the korean academy of Pediatric Dentistry
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• v.51 no.2
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• pp.149-164
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• 2024

This study compared the solubility, water absorption, dimensional stability, release of various ions (hydroxyl, calcium, sulfur, strontium, and silicon), and cytotoxicity of light-cured resin-modified pulp-capping materials. Resin-modified calcium hydroxide (Ultra-blend^TM plus, UBP), light-cured resin-modified calcium silicate (TheraCal LC^TM, TLC), and dual-cure resin-modified calcium silicate (TheraCal PT^TM, TPT) were used. Each material was polymerized; solubility, 24-hour water absorption, and 30- day dimensional stability experiments were conducted to test its physical properties. Solubility was assessed according to the ISO 6876 standard, and 24 hours of water absorption, 30 days of dimensional stability were assessed by referring to the previous protocol respectively. Eluates at 3 and 24 hours and on 7, 14, and 28 days were analyzed according to the ISO 10993-12 standard. And the pH, Ion-releasing ability, cell proliferation rate, and cell viability were assessed using the eluates to evaluate biochemical characteristics. pH was measured with a pH meter and Ion-releasing ability was assessed using inductively coupled plasma atomic emission spectrometry (ICP-AES). Cell proliferation rate and cell viability were assessed using human dental pulp cells (hDPCs). The former was assessed by an absorbance assay using the CCK-8 solution, and the latter was assessed by Live and Dead staining. TPT exhibited lower solubility and water absorption than TLC. UBP and TPT demonstrated higher stability than TLC. The release of sulfur, strontium, calcium, and hydroxyl ions was higher for TLC and TPT than for UBP. The 28-day release of hydroxyl and silicon ions was similar for TLC and TPT. TLC alone exhibited a lower cell proliferation rate compared to the control group at a dilution ratio of 1 : 2 in cell proliferation and dead cells from Live and Dead assay evaluation. Thus, when using light-cure resin-modified pulp-capping materials, calcium silicate-based materials can be considered alternatives to calcium hydroxide-based materials. Moreover, when comparing physical and biochemical properties, TPT could be prioritized over TLC as the first choice.

• Korean Journal of Materials Research
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• v.2 no.3
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• pp.180-190
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• 1992

Some solutions to several major problems in ZMR such as agglomeration of polysilicon, slips and local substrate melting are described. Experiments are performed with varying polysilicon thickness and capping oxide thickness. The aggmeration can be eliminated when nitrogen is introduced at the capping oxide layer-to-polysilicon interface and polysilicon-to-buried oxide layer interface by annealing the SOI samples at $1100^{\circ}$ in $NH_3$ ambient for three hours. The slips and local substrate melting are removed when the back surface of silicon substrate is sandblasted to produce the back surface roughness of about $20{\mu}m$. The subboundary spacing increases with increasing polysilicon thickness and the uniformity of recrystallized SOI film thickness improves with increasing capping oxide thickness, improving the quality of recrystallized SOI film. When the polysilicon thickness is about $1.0{\mu}m$ and the capping oxide thickness is $2.5{\mu}m$, the thickness variation of the recrystallized SOI film is about ${\pm}200{\AA}$ and the subboundary spacing is about $70-120{\mu}m$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.270-272
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• 2005

The behavior of surface oxidation on cobalt silicide layer was investigated under rapid thermal oxidation (RTO) conditions. The cobalt silicide layer was prepared on p-type silicon substrates. We used Ti thin film as a capping layer in order to measure the degree of oxidation of the layer. Oxide grew faster on the cobalt silicide prepared with the Ti capping layer to reach ca $500{\AA}$ at $700^{\circ}C$ in thickness. The oxide film kept growing under $550^{\circ}C\~700^{\circ}C$ of the RTO condition, resulting in a saturated state above $500{\AA}$.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.193-198
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• 2007

The NiSi is very promising candidate for the metallization in 60nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process window temperature for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5{\Omega}/{\square}$ and $3{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.

• Korean Journal of Materials Research
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• v.19 no.2
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• pp.61-67
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• 2009

Electrolessly deposited Co (Re,P) was investigated as a possible capping layer for Cu wires. 50 nm Co (Re,P) films were deposited on Cu/Ti-coated silicon wafers which acted as a catalytic seed and an adhesion layer, respectively. To obtain the optimized bath composition, electroless deposition was studied through an electrochemical approach via a linear sweep voltammetry analysis. The results of using this method showed that the best deposition conditions were a $CoSO_4$ concentration of 0.082 mol/l, a solution pH of 9, a $KReO_4$ concentration of 0.0003 mol/l and sodium hypophosphite concentration of 0.1 mol/L at $80^{\circ}C$. The thermal stability of the Co (Re,P) layer as a barrier preventing Cu was evaluated using Auger electron spectroscopy and a Scanning calorimeter. The measurement results showed that Re impurities stabilized the h.c.p. phase up to $550^{\circ}C$ and that the Co (Re,P) film efficiently blocked Cu diffusion under an annealing temperature of $400^{\circ}C$ for 1hr. The good barrier properties that were observed can be explained by the nano-sized grains along with the blocking effect of the impurities at the fast diffusion path of the grain boundaries. The transformation temperature from the amorphous to crystal structure is increased by doping the Re.