• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.561-563
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• 2012

In this work, tunable capacitors using a finger-type electrode are designed and characterized for frequency-agile RF circuit applications. Their top electrodes with different area and line width are designed in types of the finger for a long conducting perimeter which results in enhanced fringing-electric fields in order to improve their tunability. The tunable varactors were fabricated on a quartz substrate employing a multi-layer dielectric of a para/ferro/para-electric thin film. Compared to the conventional capacitor, finger-type capacitors are characterized in terms of effective capacitance and tunablility. Their effective capacitance and tunability with the long perimeter increase 24~40% and 7~12%, respectively, due to enhanced fringing electric fields from 1 to 2.5 GHz, compared to the conventional ones.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.630-634
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• 2003

This paper proposes a Carrier-Rotation PWM technique that is new solution for the voltage unbalancing problem of flying capacitors in the Flying Capacitor Multi-level Inverter (FCMI).The proposed PWM technique equalizes the utilization of phase leg voltage redundancies corresponding to the charging and the discharging state of flying capacitors during one switching period of all the switches. it also has the same switch utilization and the reduced harmonics of output voltage. Hence, it is more suitable for the FCMI compared with the conventional solutions. Experimental results on the laboratory prototype flying capacitor 3-level inverter confirm the validity of the proposed PWM technique.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 추계학술대회 논문집
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• pp.267-270
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• 2003

In this paper, a new energy recovery circuit for AC PDP(Plasma Display Panel) is proposed to decrease a sustain voltage and voltage stress on switching elements. In the proposed circuit, two auxiliary capacitors are connected directly to the power source through switching elements and inductors when ground potential is supplied to the panel. Therefore, the voltage across auxiliary capacitors can be increased by turns over the half of the source voltage. Because the intrinsic capacitance of PDP is charged sufficiently from the auxiliary capacitors, the level of sustain voltage and the voltage stress on the switching devices are decreased. To verify the validity of the proposed energy recovery circuit, computer simulations using PSpice program are carried out.

• Journal of Power Electronics
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• 제16권5호
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• pp.1752-1762
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• 2016

To achieve higher reliability in the modular multilevel converters (MMC) for HVDC transmission systems, the internal condition of the DC capacitors of the submodules (SM) needs to be monitored regularly. For an online estimation of the SM capacitance, a controlled AC current with double the fundamental frequency is injected into the circulating current loop of the MMC, which results in current and voltage ripples in the SM capacitors. The capacitor currents are calculated from the arm currents and their switching states. By processing these AC voltage and current components with digital filters, their capacitances are estimated by a recursive least square (RLS) algorithm. The validity of the proposed scheme has been verified by simulation results for a 300-MW, 300-kV HVDC system. In addition, its feasibility has been verified by experimental results obtained with a reduced-scale prototype. It has been shown that the estimation errors for both the simulation and experimental tests are 1.32% at maximum.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권7호
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• pp.338-346
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• 2001

In this paper, dc link currents for the three-phase diode rectifiers and PWM inverters are analyzed and an algorithm of estimating the life of dc link electrolytic capacitors using the analyzed ripple current is presented. Since the capacitor life is dependent on the operating temperature, the power dissipation in capacitors should be calculated. For this, the ESR(equivalent series resistance) model of the capacitor is derived and ripple currents through the capacitor are analyzed. Relating the power dissipation and the heat transfer equation, the internal operating temperature is calculated. Then, the capacitor life can be predicted by using Arrhenius's equation. An example for applications is given for the practical system.

• Transactions on Electrical and Electronic Materials
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• 제8권2호
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• pp.97-102
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• 2007

The charging/discharging characteristics of electric double layer capacitors (EDLCs) for an electric power storage device application were investigated. The specific area of the carbonaceous electrode surface by the BET method was in the range of $1800{\sim}2000\;m^2/g$. The charge distributions during charging and discharging were measured by means of a pulsed-electro-acoustic (PEA) method, and the voltage characteristics of EDLCs connected to solar cells were evaluated. The results showed that the distributions of positive and negative charges were spatially uneven, which was due to the mobility of the positive and negative charges in the carbonaceous electrode surface of the EDLCs. The charge accumulation region concentrated on central part of the carbonaceous electrode and the required times for charging and discharging were almost same.

• 대한전자공학회논문지
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• 제22권5호
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• pp.57-61
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• 1985

The e(lect of capacitance error on the A/D conversion accuracy in the A/D converter using binary-weighted capacitor array was scruntized. Besides the Monte-Carlo method considering the inter-capacitance ratios as random variables, " correlation approach" con-sidering the correlation coefficient between capacitances is proposed in this paper. Bt was observed by the measurement of capacitances of monolithic MO5 capacitors that the correla-tion coefficient between capacitors decreases as the capacitor size incrrases. It was also verified that the parallel connection of unit capacitors and the common centroid layout scheme signi(icantly increase the inter-capacitance correlation coefficients.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.277-279
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• 2008

In this paper, a novel active boost converter for SR drive is proposed. An active capacitor circuit is added in the front-end. Based on this active capacitor network, when boost switch turns off, this network seems as passive capacitor network. And the voltage of boost capacitor can keep balance with dc-link voltage automatically. In the capacitor network, discharging voltage is general dc-link voltage in parallel-connected capacitors; charging voltage is double dc-link voltage in series-connected capacitors. When boost switch turns on, two capacitors are connected in series, and discharging voltage is up to double dc-link voltage. So the fast excitation current can be obtained from this mode. Profit from fast excitation and fast demagnetization mode, the performance and output power can be improved. Some computer simulations are done to verify the performance of proposed converter.

• 전자공학회논문지A
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• 제32A권7호
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• pp.58-68
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• 1995

Polysilicon capacitors with pyrogenic oxide and TEOX oxide as insulators were fabricated to develop capacitors which can be applied to analog CMOS IC, and the characteristics of the capacitors were compared with each other. The morphology of bottom polysilicon in pyrogenic oxide capacitor is degraded due to the generaged protuberances of the polysilicon grain during oxidataion. The polysilican capacitor with pyrogenic oxide of 57 nm thickness showed that the effective potential barrier height of 0.45 eV is much less than that of MOS capacitor (3.2 eV)when the top electrode is biased with a positive volgate. The morphology of the polysilicon capacitor with TEOS oxide, however, was not degraded during oxide deposition by LPCVD. The polysilicon capacitor with TEOS oxide of 54 nm thickness showed the effective potential barrier height of 1.28 eV when the top electrode is biased with a negative voltage. Therefore, it is concluded that the polysilicon capacitor with TEOS oxide is more applicable to analog CMOS IC than the pyrogenic oxide polysilicon capacitor.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -1
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• pp.155-158
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• 2000

Circuit configurations for realizing of biquadratic current transfer functions using current conveyors (CCIIs) are presented. The circuits are composed of three multiple-output CCIIs and four passive elements (two resistors and two grounded capacitors), and when current controlled conveyors (CCIIs) in place of CCIIs are employed, the circuit can be realized using three multiple-output CCIIs and two grounded capacitors. Use of grounded capacitors is suitable for integrated implementation. The cutoff frequency of a realized filter with current gain K can be tuned independently of Q by the value of K.