• 한국전자파학회논문지
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• 제23권7호
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• pp.774-783
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• 2012

본 논문에서는 주기적인 요철 모양의 구조를 이용하여 인접해 있는 선로 간의 누화(crosstalk) 감소 효과를 갖는 전송 선로를 제안한다. 요철 모양의 전송 선로는 인접한 선로 간의 유도성 커플링과 용량성 커플링의 크기를 동일하게 조절이 가능하다. 따라서 유도성과 용량성의 커플링이 서로 상쇄되기 때문에 누화 감소 효과를 갖는다. 요철 모양의 전송 선로는 비유전율이 3.38이며, 두께가 0.508 mm인 RO4003 기판 위에 설계하였다. 전산모의 실험 결과, 일반적인 전송 선로와 주기 간격이 A=1 mm인 요철 모양 전송 선로의 far-end 누화는 30 GHz까지 각각 최대 -3.6 dB와 -22 dB 값을 가진다. 측정 결과, 일반적인 전송 선로와 A=1 mm인 요철 모양 전송 선로의 far-end 누화는 30 GHz까지 각각 최대 -6.3 dB와 -20.5 dB 값을 가진다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2014년도 추계학술대회 논문집
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• pp.85-86
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• 2014

The paper presents a power supply of atmospheric-pressure plasma reactor based on SiC (Silicon Carbide) MOSFET resonant inverter. Thanks to the capacitive characteristic of capacitive coupling plasma reactor type, the LC series resonant inverter had been applied to take advantages of this topology with the implementation of SiC MOSFET power modules as switching power devices. Designation of gate driver for SiC MOSFET had been introduced by this paper. The 5kVp, 5kW power supply had also been verified by experimental results.

• 대한의용생체공학회:의공학회지
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• 제29권4호
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• pp.267-271
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• 2008

The RF shimming technique has been used to improve the transmit RF field homogeneity in highfield MRI. In the RF shimming technique, the amplitude and phase of the driving currents in each coil element are optimized to get homogenous flip angle or uniform image intensity. The inductive and capacitive coupling between the coil elements may degrade the RF field homogeneity if not taken into account in the optimization procedure. In this paper, we have analyzed the coupling effects on the RF shimming using a sixteen-element TEM RF coil model operating at 300 MHz. We have found that the coupling effects on the RF shimming can be reduced by putting high dielectric material between the active rung and the shield.

• 한국전기전자재료학회논문지
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• 제19권7호
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• pp.601-604
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• 2006

In this paper, we propose the single poly-Si Flash EEPROM device with a new structure which does not need the high voltage switching circuits. The device was designed, fabricated and characterized. From the measurement results, it was found that the program, the erase and the read operations worked properly. The threshold voltage was 3.1 V after the program in which the control gate and the drain were biased with 12 V and 7 V for $100{\mu}S$, respectively. And it was 0.4 V after the erase in which the control gate was grounded and the drain were biased with 11 V for $200{\mu}S$. On the other hand, it was found that the program and the erase speeds were significantly dependent on the capacitive coupling ratio between the control gate and the floating gate. The larger the capacitive coupling ratio, the higher the speeds, but the target the area per cell. The optimum structure of the cell should be chosen with the consideration of the trade-offs.

• 전기학회논문지
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• 제60권1호
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• pp.14-19
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• 2011

The implemetation of the AC and DC lines on the same transmission tower is an economical and practical approaching that increase the power transmission capacity of an existing transmission corridor. But, In this case, Inductive and capacitive coupling between AC and DC lines on the same tower should be investigated in advance. According to the installation plan of ${\pm}80kV$ 60MW bipole HVDC in Jeju island, KOREA that will be commissioned until 2011, DC lines will parallely operate with 154kV 2 AC lines in existed 154kV AC 4 lines transmission tower. This paper presents the transient analysis results about the interaction between 154kV AC and 80kV DC lines in the same transmission tower.

• Journal of Power Electronics
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• 제19권3호
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• pp.637-644
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• 2019

Wireless power transfer (WPT) technology with various transfer mechanisms such as inductive coupling, magnetic resonance and capacitive coupling is being widely researched. Until now, power transfer efficiency (PTE) and power transfer capability (PTC) have been the primary concerns for designing and developing WPT systems. Therefore, a lot of studies have been documented to improve PTE and PTC. However, power consumption in the standby mode, also defined as the no-load mode, has been rarely studied. Recently, since the number of WPT products has been gradually increasing, it is necessary to develop techniques for reducing the standby power consumption of WPT systems. This paper investigates the standby power consumption of commercial WPT products. Moreover, a standby power reduction technique for WPT systems via magnetic resonance coupling (MRC) with a parallel resonance type resonator is proposed. To achieve a further standby power reduction, the voltage control of an AC/DC travel adapter is also adopted. The operational principles and characteristics are described and verified with simulation and experimental results. The proposed method greatly reduces the standby power consumption of a WPT system via MRC from 2.03 W to 0.19 W.

• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1656-1663
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• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• Transactions on Electrical and Electronic Materials
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• 제16권1호
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• pp.16-19
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• 2015

A wearable sensing ECG T-shirt for ubiquitous vital signs sensing is proposed. The sensor system consists of a signal processing board and capacitive sensing electrodes which together enable measurement of an electrocardiogram (ECG) on the human chest with minimal discomfort. The capacitive sensing method was employed to prevent direct ECG measurement on the skin and also to provide maximum convenience to the user. Also, low power integrated circuits (ICs) and passive electrodes were employed in this research to reduce the power consumption of the entire system. Small flexible electrodes were placed into cotton pockets and affixed to the interior of a worn tight NIKE Pro combat T-shirt. Appropriate signal conditioning and processing were implemented to remove motion artifacts. The entire system was portable and consumed low power compared to conventional ECG devices. The ECG signal obtained from a 24 yr. old male was comparable to that of an ECG simulator.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.82-85
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• 2004

This paper proposes an advanced circuit for the capacitive type fingerprint sensor signal processing and an effective isolation structure for minimizing an electrostatic discharge(ESD) influence and for removing a signal coupling noise of each sensor pixel. The proposed detection circuit increases the voltage difference between a ridge and valley about $80\%$ more than old circuit. The test chip is composed of $160\;\times\;192$ array sensing cells $(9,913\times11,666\;um^2).$ The sensor plate area is $58\;\times\;58\;um^2$ and the pitch is 60um. The image resolution is 423 dpi. The chip was fabricated on a 0.35um standard CMOS process. It successfully captured a high-quality fingerprint image and performed the registration and identification processing. The sensing and authentication time is 1 sec(.) with the average power consumption of 10 mW at 3.0V. The reveal ESD tolerance is obtained at the value of 4.5 kV.

• 대한전자공학회논문지SD
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• 제48권11호
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• pp.9-17
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• 2011

반도체 공정의 발달로 인해 칩의 집적도가 높아졌으며, 연결선 사이의 간격 또한 좁아지게 되었다. 그로 인해 연결선 내에 존재하는 커패시턴스와 인덕턴스가 증가하게 되었고, 특히 전역 연결선들에서는 자신의 그라운드 커패시턴스보다 인접한 다른 연결선과의 결합 커패시턴스가 더욱 커지는 경향을 보이게 되었다. 이러한 현상으로 인해 발생하는 유도성 결합과 용량성 결합은 인접한 연결선의 신호 간섭으로 심각한 문제를 야기할 수 있다. 본 논문에서는 추가적인 연결선을 이용하여 신호 무결성을 저해시키는 누화잡음을 제거하면서, 입력 데이터의 확률을 고려하여 동적 전력 소모를 최소화하는 코드워드 생성 기법을 제안하였다. 제안한 기법의 성능평가를 위해 FastCap 및 FastHenry 프로그램과 HSPICE를 이용하여 실험한 결과, 소모 전력에서 기존 기법보다 평균 15% 정도의 감소를 보임을 확인하였다.