• 한국진공학회지
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• 제4권S1호
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• pp.168-173
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• 1995

$GaxIn{1_x}As$ epitaxial layers were grown by a simplified hydrode vapor phase epitaxy(VPE) method bsed on the utilization of Ga/In alloy as the source metal. The effects of a wide range of experimental variables(i.e.,inlet mole fraction of HCI, deposition temperature, Ga/In alloy composition) on the ternary composition and growth rate were investigated. Layers of $Ga_{0.47}In_{0.53}As$ lattice matched to InP were successfully grown from alloys containing 5 to 8 at.% Ga. These layers were used to produce state-of-the art p-i-n photodetectors having the following characteristics: dark current, $I_d$(-5V) = 10-20 nA: responsivity, R=0.84-0.86 A/W; dark current, Id(-5V)=10-20 nA; responsivity, R=0.84-0.86 A/W; capacitance, C=0.88-0.92 pF; breakdown voltage, $V_b$ >40V. This study demonstrated for the first time that a simplified hydride VPE process with a Ga/In alloy source is capable of producing device quality epitaxial layers.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.358-361
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• 2002

Self-aligned MOSFETS using a polysilicon gate are widely fabricated in silicon technology. The polysilicon layer acts as a mask for the source and drain implants and does as gate electrode in the final product. However, the usage of polysilicon gate as a self-aligned mask is restricted in fabricating SiC MOSFETS since the following processes such as dopant activation, ohmic contacts are done at the very high temperature to attack the stability of the polysilicon layer. A metal instead of polysilicon can be used as a gate material and even can be used for ohmic contact to source region of SiC MOSFETS, which may reduce the number of the fabrication processes. Co-formation process of metal-source/drain ohmic contact and gate has been examined in the 4H-SiC based vertical power MOSFET At low bias region (<20V), increment of leakage current after RTA was detected. However, the amount of leakage current increment was less than a few tens of ph. The interface trap densities calculated from high-low frequency C-V curves do not show any difference between w/ RTA and w/o RTA. From the C-V characteristic curves, equivalent oxide thickness was calculated. The calculated thickness was 55 and 62nm for w/o RTA and w/ RTA, respectively. During the annealing, oxidation and silicidation of Ni can be occurred. Even though refractory nature of Ni, 950$^{\circ}C$ is high enough to oxidize it. Ni reacts with silicon and oxygen from SiO$_2$ 1ayer and form Ni-silicide and Ni-oxide, respectively. These extra layers result in the change of capacitance of whole oxide layer and the leakage current

• 한국재료학회지
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• 제22권3호
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• pp.118-122
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• 2012

We synthesized porous $Co_3O_4/RuO_2$ composite using the soft template method. Cetyl trimethyl ammonium bromide (CTAB) was used to make micell as a cation surfactant. The precipitation of cobalt ion and ruthenium ion for making porosity in particles was induced by $OH^-$ ion. The porous $Co_3O_4/RuO_2$ composite was completely synthesiszed after anealing until $250^{\circ}C$ at $3^{\circ}C$/min. From the XRD ananysis, we were able to determine that the porous $Co_3O_4$/RuO2 composite was comprised of nanoparticles with low crystallinity. The shape or structure of the porous $Co_3O_4/RuO_2$ composite was studied by FE-SEM and FE-TEM. The size of the porous $Co_3O_4/RuO_2$ composite was 20~40 nm. From the FE-TEM, we were able to determine that porous cavities were formed in the composite particles. The electrochemical performance of the porous $Co_3O_4/RuO_2$ composite was measured by CV and charge-discharge methods. The specific capacitances, determined through cyclic voltammetry (CV) measurement, were ~51, ~47, ~42, and ~33 F/g at 5, 10, 20, and 50 mV/sec scan rates, respectively. The specific capacitance through charge-discharge measurement was ~63 F/g in the range of 0.0~1.0 V cutoff voltage and 50 mAh/g current density.

• 한국진공학회지
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• 제11권3호
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• pp.135-140
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• 2002

본 논문에서는 p-type (100)Si, (100)MgO 그리고 MgO/si 기판 위에 RF Magnetron sputtering 법으로 $Ba_{0.5}Sr_{0.5}TiO_3$(BST)박막을 증착하였다. BST 박막 증착 후 RTA(Rapid Thermal Annealing)를 이용하여 $600^{\circ}C$에서 산소분위기로 1분간 고온 급속 열처리를 하였다. 증착된 BST박막의 결정화를 조사하기 위해 XRD(X-Ray Diffraction)측정을 한 결과 모든 기판에서 (110) $Ba_{0.5}Sr_{0.5}TiO_3$(의 주피크가 관찰되어졌고, 열처리 후 재결정화에 기인하여 피크 세기가 증가함을 관찰할 수 있었다. Al 전극을 이용한 커패시터 제작 후 측정한 C-V(Capacitance-Voltage) 특성에서 각각의 기판에서 측정된 커패시턴스 값으로 계산된 유전율은 120(bare Si), 305(Mgo/Si) 그리고 310(MgO)이었다. 누설 전류 특성에서는 0.3 MV/cm이내의 인가전계에서 1 $\mu\textrm{A/cm}^2$ 이하의 안정된 값을 보여주었다. 결론적으로 MgO 버퍼층을 이용한 기판이 BST 박막의 증착을 위한 기판으로써 효과적임을 알 수 있었다.

• Nuclear Engineering and Technology
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• 제55권1호
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• pp.201-208
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• 2023

The dependence of the electrical characteristics on the fast neutron fluence of an epitaxial 4H-SiC Schottky barrier diode (SBD) was investigated. The 30 MeV cyclotron was used for fast neutron irradiation. The neutron fluences evaluated through Monte Carlo simulation were in the 2.7 × 10¹¹ to 1.45 × 10¹³ neutrons/cm² range. Current-voltage and capacitance-voltage measurements were performed to characterize the samples by extracting the parameters of the irradiated SBDs. Neutron-induced defects in the epitaxial layer were identified and quantified using a deep-level transient spectroscopy measurement system developed at the Korea Atomic Energy Research Institute. As the neutron fluence increased from 2.7 × 10¹¹ to 1.45 × 10¹³ neutrons/cm², the concentration of the Z_1/2 defects increased by approximately 20 times. The maximum defect concentration was estimated as 1.5 × 10¹⁴ cm^-3 at a neutron fluence of 1.45 × 10¹³ neutrons/cm².

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.187-187
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• 2012

Solution-processed metal-alloy oxides such as indium zinc oxide (IZO), indium gallium zinc oxide (IGZO) has been extensively researched due to their high electron mobility, environmental stability, optical transparency, and solution-processibility. In spite of their excellent material properties, however, there remains a challenging problem for utilizing IZO or IGZO in electronic devices: the supply shortage of indium (In). The cost of indium is high, what is more, indium is becoming more expensive and scarce and thus strategically important. Therefore, developing an alternative route to improve carrier mobility of solution-processable ZnO is critical and essential. Here, we introduce a simple route to achieve high-performance and low-temperature solution-processed ZnO thin film transistors (TFTs) by employing alkali-metal doping such as Li, Na, K or Rb. Li-doped ZnO TFTs exhibited excellent device performance with a field-effect mobility of $7.3cm^2{\cdot}V-1{\cdot}s-1$ and an on/off current ratio of more than 107. Also, in case of higher drain voltage operation (VD=60V), the field effect mobility increased up to $11.45cm^2{\cdot}V-1{\cdot}s-1$. These all alkali metal doped ZnO TFTs were fabricated at maximum process temperature as low as $300^{\circ}C$. Moreover, low-voltage operating ZnO TFTs was fabricated with the ion gel gate dielectrics. The ultra high capacitance of the ion gel gate dielectrics allowed high on-current operation at low voltage. These devices also showed excellent operational stability.

• 한국전기전자재료학회논문지
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• 제19권9호
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• pp.808-812
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• 2006

In this dissertation, Ru-Zr metal gate electrode deposited on two kinds of dielectric were formed for MOS capacitor. Sample co-sputtering method was used as a alloy deposition method. Various atomic composition was achieved when metal film was deposited by controlling sputtering power. To study the characteristics of metal gate electrode, C-V(capacitance-voltage) and I-V(current-voltage) measurements were performed. Work function and equivalent oxide thickness were extracted from C-V curves by using NCSU(North Carolina State University) quantum model. After the annealing at various temperature, thermal/chemical stability was verified by measuring the variation of effective oxide thickness and work function. This dissertation verified that Ru-Zr gate electrodes deposited on $SiO_{2}\;and\;ZrO_{2}$ have compatible work functions for NMOS at the specified atomic composition and this metal alloys are thermally stable. Ru-Zr metal gate electrode deposited on $SiO_{2}\;and\;ZrO_{2}$ exhibit low sheet resistance and this values were varied with temperature. Metal alloy deposited on two kinds of dielectric proposed in this dissertation will be used in company with high-k dielectric replacing polysilicon and will lead improvement of CMOS properties.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.79-79
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• 2013

Quantum-structures with nanoparticles have been attractive for various electronic and photonic devices [1,2]. In recent, nonvolatile memories such as nano-floating gate memory (NFGM) and resistance random access memory (ReRAM) have been studied using silicides, metals, and metal oxides nanoparticles [3,4]. In this study, we fabricated nonvolatile memories with silicides (WSi2, Ti2Si, V2Si) and metal-oxide (Cu2O, Fe2O3, ZnO, SnO2, In2O3 and etc.) nanoparticles embedded in polyimide matrix, and photovoltaic device also with SiC nanoparticles. The capacitance-voltageand current-voltage data showed a threshold voltage shift as a function of write/erase voltage, which implies the carrier charging and discharging into the metal-oxide nanoparticles. We have investigated also the electrical properties of ReRAM consisted with the nanoparticles embedded in ZnO, SiO2, polyimide layer on the monolayered graphene. We will discuss what the current bistability of the nanoparticle ReRAM with monolayered graphene, which occurred as a result of fully functional operation of the nonvolatile memory device. A photovoltaic device structure with nanoparticles was fabricated and its optical properties were also studied by photoluminescence and UV-Vis absorption measurements. We will discuss a feasibility of nanoparticles to application of nonvolatile memories and photovoltaic devices.

• 마이크로전자및패키징학회지
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• 제9권4호
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• pp.11-16
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• 2002

본 연구에서는 $SrBi_2Ta_2O_9$ (SBT)박막의 고속식각에 따른 잔류물질 및 식각 손상의 영향을 조사하였다. ICP-RIE (inductively coupled plasma reactive ion etching) 의 ICP power와 CCP(capacitively coupled plasma) power를 변화시키면서 고속식각에 따른 박막의 손상과 열화를 XPS 분석과 Capacitance-Voltage (C-V) 측정을 통하여 알아보았다. ICP와 CCP의 power가 증가함에 따라 식각율이 증가하였고 ICP power가 700 W, CCP power가 200 W 일때 식각율은 900$\AA$/min이었다. 강유전체의 건식식각에 있어서 문제점이 플라즈마에 의한 강유전체 박막의 열화인데 반응가스 $Ar/C1_2/CHF_3$를 20/14/2의 비율로 사용하고 ICP와 CCP power를 각각 700w와 200w로 사용하였을 때 전혀 열화되지 않는 강유전체 박막의 특성을 얻을 수 있었다. 본 연구 결과는 Metal-Ferroelectric-Semiconductor (MFS) 또는 Metal-Ferroelectric-Insulator-Semiconductor (MFIS) 구조를 가지는 단일 트랜지스터형 강유전체 메모리 소자를 만드는데 건식 식각이 응용될 수 있음을 보여준다

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1123-1125
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• 1995

In order to investigate the electrical properties for transformer oils, the dielectric properties and volume resistivity were made researches. To measure the characteristics of dielectric liquid, volume resistivity and dielectric loss, coaxial cylindrical liquid electrode was used, geometric capacitance was confirmed to 16[pF]. Highmegohm meter of VMG-1000 was used for measuring volume resistivity, the appling voltages were DC 100, 250, 500[V] in the temperature range of $20{\sim}100[^{\circ}C]$. Experiments for measuring the dielectric loss were performed at $20{\sim}120[^{\circ}C]$ in temperature range, $30{\sim}1.5{\times}10^5$[Hz] in frequency range and $300{\sim}1500$[mV] in voltage range and then, the result of experiment for the movement of carrier and the physical constants to contribute dielectric properties is introduced.