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http://dx.doi.org/10.4313/JKEM.2006.19.9.808

Property Comparison of Ru-Zr Alloy Metal Gate Electrode on ZrO2 and SiO2  

Seo, Hyun-Sang (한국항공대학교 항공전자공학과)
Lee, Jeong-Min (한국항공대학교 항공전자공학과)
Son, Ki-Min (한국항공대학교 항공전자공학과)
Hong, Shin-Nam (한국항공대학교 항공전자공학과)
Lee, In-Gyu (한국항공대학교 항공전자공학과)
Song, Yo-Seung (한국항공대학교 항공전자공학과)
Publication Information
Journal of the Korean Institute of Electrical and Electronic Material Engineers / v.19, no.9, 2006 , pp. 808-812 More about this Journal
Abstract
In this dissertation, Ru-Zr metal gate electrode deposited on two kinds of dielectric were formed for MOS capacitor. Sample co-sputtering method was used as a alloy deposition method. Various atomic composition was achieved when metal film was deposited by controlling sputtering power. To study the characteristics of metal gate electrode, C-V(capacitance-voltage) and I-V(current-voltage) measurements were performed. Work function and equivalent oxide thickness were extracted from C-V curves by using NCSU(North Carolina State University) quantum model. After the annealing at various temperature, thermal/chemical stability was verified by measuring the variation of effective oxide thickness and work function. This dissertation verified that Ru-Zr gate electrodes deposited on $SiO_{2}\;and\;ZrO_{2}$ have compatible work functions for NMOS at the specified atomic composition and this metal alloys are thermally stable. Ru-Zr metal gate electrode deposited on $SiO_{2}\;and\;ZrO_{2}$ exhibit low sheet resistance and this values were varied with temperature. Metal alloy deposited on two kinds of dielectric proposed in this dissertation will be used in company with high-k dielectric replacing polysilicon and will lead improvement of CMOS properties.
Keywords
Gate electrode; High-k; Ru; Zr; $ZrO_{2}$;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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1 Y. Taur, D. A. Buchanan, W. Chen, D. J Frank, K. E. Ismail, S. H. Lo, G. A. Sai-Halasz, R. G. Viswanathan, H. J. Wann, S. J. Wind, and H. S. Wong, 'CMOS scaling into the nanometer regime', Proceedings of the IEEE, Vol. 85, No.4, p. 486, 1997   DOI   ScienceOn
2 Y. C. Yeo, Q. Lu, P. Ranade, H. Takeuchi, K. J. Yang, I. Polishchuk, T. J. King, C. Hu, S. C. Song, H. F. Luan, and D. L. Kwong, 'Dual-metal gate CMOS technology with ultrathin silicon nitride gate dielectric', IEEE Electron Device Letters, Vol. 22, No.5, p. 227, 2001   DOI   ScienceOn
3 H. Zhong, S. N. Hong, Y. S. Suh, H. Lazar, G. Heuss, and V. Misra 'Propreties of Ru-Ta alloys as gate electrodes for NMOS and PMOS silicon devices', IEDM Technical Digest, p. 467, 2001
4 이충근, 서현상, 홍신남, '박막 게이트 산화막에 대한 Ru-Zr 금속 게이트의 신뢰성에 관한 연구', 대한전기학회논문지, 53C권, 4호, p. 208, 2004
5 J. R. Hauser and K. Ahmed, 'Characterization of ultrathin oxides using electrical C-V and I-V measurements', Gaithersburg, MD: Nat. Inst. Stand. Technol., 1998
6 W. C. Lee and C. Hu, 'Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling', Symposium on VLSI Technology Digest of Technical Papers, p. 198, 2000
7 V. Misra, H. Zhong, and H. Lazar, 'Electrical properties of Ru-based alloy gate electrodes for dual metal gate Si-CMOS', IEEE Electron Device Letters, Vol. 23, No.6, p. 354, 2002   DOI   ScienceOn
8 K. Ino, T. Ushiki, K. Kawai, I. Ohshima, T. Shinohara, and T. Ohmi, 'Highly-reliable low-resistivity bcc-Ta gate MOS technology using low-damage Xe-plasma sputtering and Si-encapsulated silicidation process', Symposium on VLSI Technology Digest of Technical Papers, p. 186, 1998