• Title/Summary/Keyword: capacitance - voltage (C-V)

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Third order Sigma-Delta Modulator with Delayed Feed-forward Path for Low-power Operation (저전력 동작을 위한 지연된 피드-포워드 경로를 갖는 3차 시그마-델타 변조기)

  • Lee, Minwoong;Lee, Jongyeol
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.10
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    • pp.57-63
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    • 2014
  • This paper proposes an architecture of $3^{rd}$ order SDM(Sigma-Delta Modulator) with delayed feed-forward path in order to reduce the power consumption and area. The proposed SDM improve the architecture of conventional $3^{rd}$ order SDM which consists of two integrators. The proposed architecture can increase the coefficient values of first stage doubly by inserting the delayed feed-forward path. Accordingly, compared with the conventional architecture, the capacitor value($C_I$) of first integrator is reduced by half. Thus, because the load capacitance of first integrator became the half of original value, the output current of first op-amp is reduced as 51% and the capacitance area of first integrator is reduced as 48%. Therefore, the proposed method can optimize the power and the area. The proposed architecture in this paper is simulated under conditions which are supply voltage of 1.8V, input signal 1Vpp/1KHz, signal bandwidth of 24KHz and sampling frequency of 2.8224MHz in the 0.18um CMOS process. The simulation results are SNR(Signal to Noise Ratio) of 88.9dB and ENOB(Effective Number of Bits) of 14-bits. The total power consumption of the proposed SDM is $180{\mu}W$.

CHARACTERISTICS OF HETEROEPITAXIALLY GROWN $Y_2$O$_3$ FILMS BY r-ICB FOR VLSI

  • Choi, S.C.;Cho, M.H.;Whangbo, S.W.;Kim, M.S.;Whang, C.N.;Kang, S.B.;Lee, S.I.;Lee, M.Y.
    • Journal of the Korean institute of surface engineering
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    • v.29 no.6
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    • pp.809-815
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    • 1996
  • $Y_2O_3$-based metal-insulator-semiconductor (MIS) structure on p-Si(100) has been studied. Films were prepared by UHV reactive ionized cluster beam deposition (r-ICBD) system. The base pressure of the system was about $1 \times 10^{-9}$ -9/ Torr and the process pressure $2 \times 10^{-5}$ Torr in oxygen ambience. Glancing X-ray diffraction(GXRD) and in-situ reflection high energy electron diffracton(RHEED) analyses were performed to investigate the crystallinity of the films. The results show phase change from amorphous state to crystalline one with increasingqr acceleration voltage and substrate temperature. It is also found that the phase transformation from $Y_2O_3$(111)//Si(100) to $Y_2O_3$(110)//Si(100) in growing directions takes place between $500^{\circ}C$ and $700^{\circ}C$. Especially as acceleration voltage is increased, preferentially oriented crystallinity was increased. Finally under the condition of above substrate temperature $700^{\circ}C$ and acceleration voltage 5kV, the $Y_2O_3$films are found to be grown epitaxially in direction of $Y_2O_3$(1l0)//Si(100) by observation of transmission electron microscope(TEM). Capacitance-voltage and current-voltage measurements were conducted to characterize Al/$Y_2O_3$/Si MIS structure with varying acceleration voltage and substrate temperature. Deposited $Y_2O_3$ films of thickness of nearly 300$\AA$ show that the breakdown field increases to 7~8MV /cm at the same conditon of epitaxial growing. These results also coincide with XPS spectra which indicate better stoichiometric characteristic in the condition of better crystalline one. After oxidation the breakdown field increases to 13MV /cm because the MIS structure contains interface silicon oxide of about 30$\AA$. In this case the dielectric constant of only $Y_2O_3$ layer is found to be $\in$15.6. These results have demonstrated the potential of using yttrium oxide for future VLSI/ULSI gate insulator applications.

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A Study on the Characteristic of MOS structure using $HfO_{2}$ as high-k gate dielectric film ($HfO_{2}$를 이용한 MOS 구조의 제작 및 특성)

  • Park, C.I.;Youm, M.S.;Park, J.W.;Kim, J.W.;Sung, M.Y.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.163-166
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    • 2002
  • We investigated structural and electrical properties of Metal-Oxide-Semiconductor(MOS) structure using Hafnium $oxide(HfO_{2})$ as high-k gate dielectric material. $HfO_{2}$ films are ultrathin gate dielectric material witch have a thickness less than 2.0nm, so it is spotlighted to be substituted $SiO_{2}$ as gate dielectric material. In this paper We have grown $HfO_{2}$ films with pt electrode on P-type Silicon substrate by RF magnetron sputtering system using $HfO_{2}$ target and oserved the property of semiconductor-oxide interface. Using pt electrode, it is necessary to be annealed at ${300^{\circ}C}$. This process is to increase an adhesion ratio between $HfO_{2}$ films with pt electrode. In film deposition process, the deposition time of $HfO_{2}$ films is an important parameter. Structura1 properties are invetigated by AES depth profile, and electrical properties by Capacitance-Voltage characteristic. Interface trap density are measured to observe the interface between $HfO_{2}$ with Si using High-frequency(1MHz) C-V and Quasi - static C-V characteristic.

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Reactive RF Magnetron Sputtering에 의해 성장된 Si(100) 과 Si(111) 기판 위에 증착된 $CeO_2$ 박막의 구조적, 전기적 특성

  • 김진모;김이준;정동근
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.103-103
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    • 1999
  • CeO2 는 cubic 구조의 일종인 CeF2 구조를 가지며 격자 상수가 0.541nm로 Si의 격자 상수 0.543nm와 거의 비슷하여 Si과의 부정합도가 0.35%에 불과하여 CeO2를 Si 기판 위에 에피택셜하게 성장시킬 수 있는 가능성이 크다. 따라서 SOI(Silicon-On-Insulator) 구조의 실현을 위하여 Si 기판위에 CeO2를 에피택셜하게 성장시키려는 많은 노력이 있었다. 또한 CeO2 는 열 적으로 대단히 안정된 물질로서 금속/강유전체/반도체 전계효과 트랜지스터(MFSFET : metal-ferroelectric-semiconductor field effect transistor)에서 ferroelectric 박막과 Si 기판사이에 완충층으로 사용되어 강유전체의 구성 원자와 Si 원자들간의 상호 확산을 방지함으로써 경계면의 특성을 향상시기키 위해 사용된다. e-beam evaporation와 laser ablation에 의한 Si 기판 위의 CeO2 격자 성장에 관한 많은 보고서가 있다. 이 방법들은 대규모 생산 공정에서 사용하기 어려운 반면 RF-magnetron sputtering은 대규모 반도체 공정에 널리 쓰인다. Sputtering에 의한 Si 기판위의 CeO2 막의 성장에 관한 보고서의 수는 매우 적다. 이 논문에서는 Ce target을 사용한 reactive rf-magnetron sputtering에 의해 Si(100) 과 Si(111) 기판위에 성장된 CeO2 의 구조 및 전기적 특성을 보고하고자 한다. 주요한 증착 변수인 증착 power와 증착온도, Seed Layer Time이 성장막의 결정성에 미치는 영향을 XRD(X-Ray Diffractometry) 분석과 TED(Transmission Electron Diffration) 분석에 의해 연구하였고 CeO2 /Si 구조의 C-V(capacitance-voltage)특성을 분석함으로써 증차된 CeO2 막과 실리콘 기판과의 계면 특성을 연구하였다. CeO2 와 Si 사이의 계면을 TEM 측정에 의해 분석하였고, Ce와 O의 화학적 조성비를 RBS에 의해 측정하였다. Si(100) 기판위에 증착된 CeO2 는 $600^{\circ}C$ 낮은 증착률에서 seed layer를 하지 않은 조건에서 CeO2 (200) 방향으로 우선 성장하였으며, Si(111) 기판 위의 CeO2 박막은 40$0^{\circ}C$ 높은 증착률에서 seed layer를 2분이상 한 조건에서 CeO2 (111) 방향으로 우선 성장하였다. TEM 분석에서 CeO2 와 Si 기판사이에서 계면에서 얇은 SiO2층이 형성되었으며, TED 분석은 Si(100) 과 Si(111) 위에 증착한 CeO2 박막이 각각 우선 방향성을 가진 다결정임을 보여주었다. C-V 곡선에서 나타난 Hysteresis는 CeO2 박막과 Si 사이의 결함때문이라고 사료된다.

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Dielectric Characteristics of Carbon Nitride Films on Quartz Substrate (석영기판에 증착된 질화탄소막의 유전특성)

  • Ha, Se-Geun;Lee, Ji-Gong;Lee, Sung-Pil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.872-875
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    • 2003
  • Carbon nitride($CN_x$) thin films were deposited on quartz substrates using reactive RF magnetron sputtering system at uarious deposition conditions and investigated dielectric characteristics. Samples for capacitance measurements were of the MIM(Metal-Insulator-Metal) type devices. Aluminum film electrodes were prepared by a vacuum thermal evaporation method before and after the deposition of carbon nitride films. Capacitances were measured by a FLUKE PM6306 RCL Meter at room temperature. Current-voltage(I-V) characteristics and resistivity were measured by a CATS CA-EDA semiconductor test and analyzer. The carbon nitride films showed ${\alpha}-C_3N_4$ and ${\beta}-C_3N_4$ etc. peaks through Raman and FTIR. Observed surface of film and side structure using SEM(Scanning Electron Microscope), and measured thickness of film by ${\alpha}-step$. We can find that the dielectric constant was the lowest value in 50% nitrogen ratio and the resistivity was the highest value in 70% nitrogen ratio.

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Zirconium Titanate Thin FIlm Prepared by Surface Sol-Gel Process and Effects of Thickness on Dielectric Property

  • Kim, Chy-Hyung;Lee, Moon-Hee
    • Bulletin of the Korean Chemical Society
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    • v.23 no.5
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    • pp.741-744
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    • 2002
  • Single phase of multicomponent oxide ZrTiO4 film could be prepared through surface sol-gel route simply by coating the mixture of 100 mM zirconium butoxide and titanium butoxide on $Pt/Ti/SiO_2Si(100)$ substrate, following pyro lysis at $450^{\circ}C$, and annealing it at 770 $^{\circ}C.$ The dielectric constant of the film was reduced as the film thickness decreased due to of the interfacial effects caused by layer/electrode and a few voids inside the multilayer. However, the dielectric property was independent of applied dc bias sweeps voltage (-2 to +2 V).The dielectric constant of bulk film, 31.9, estimated using series-connected capacitor model was independent of film thickness and frequency in the measurement range, but theoretical interfacial thickness, ti, was dependent on the frequency. It reached a saturated ti value, $6.9{\AA}$, at high frequency by extraction of some capacitance component formed at low frequency range. The dielectric constant of bulk ZrTiO4 pellet-shaped material was 33.7 and very stable with frequency promising as good applicable devices.

High-rate, Low-temperature Deposition of Multifunctional Nano-crystalline Silicon Nitride Films

  • Hwang, Jae-Dam;Lee, Kyoung-Min;Keum, Ki-Su;Lee, Youn-Jin;Hong, Wan-Shick
    • Journal of Information Display
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    • v.11 no.3
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    • pp.109-112
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    • 2010
  • The solid phase compositions and dielectric properties of silicon nitride ($SiN_x$) films prepared using the plasma enhanced chemical vapor deposition (PECVD) technique at a low temperature ($200^{\circ}C$) were studied. Controlling the source gas mixing ratio, R = $[N_2]/[SiH_4]$, and the plasma power successfully produced both silicon-rich and nitrogen-rich compositions in the final films. The composition parameter, X, varied from 0.83 to 1.62. Depending on the film composition, the dielectric properties of the $SiN_x$ films also varied substantially. Silicon-rich silicon nitride (SRSN) films were obtained at a low plasma power and a low R. The photoluminescence (PL) spectra of these films revealed the existence of nano-sized silicon particles even in the absence of a post-annealing process. Nitrogen-rich silicon nitride (NRSN) films were obtained at a high plasma power and a high R. These films showed a fairly high dielectric constant ($\kappa$ = 7.1) and a suppressed hysteresis window in their capacitance-voltage (C-V) characteristics.

Characteristics and Processing Effects of $ZrO_2$ Thin Films grown by Metal-Organic Molecular Beam Epitaxy (금속 유기 분자 빔 에피택시로 성장시킨 $ZrO_2$ 박막의 특성과 공정변수가 박막 성장률에 미치는 영향)

  • Kim, Myung-Suk;Go, Young-Don;Hong, Jang-Hyuk;Jeong, Min-Chang;Myoung, Jae-Min;Yun, Il-Gu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.452-455
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    • 2003
  • [ $ZrO_2$ ] dielectric layers were grown on the p-type Si (100) substrate by metalorganic molecular beam epitaxy(MOMBE). Zrconium t-butoxide, $Zr(O{\cdot}t-C_4H_9)_4$ was used as a Zr precursor and Argon gas was used as a carrier gas. The thickness of the layers was measured by scanning electron microscopy (SEM) and the properties of the $ZrO_2$ layers were evaluated by X-ray diffraction, high frequency capacitance-voltage measurement. and HF C-V measurements have shown that $ZrO_2$ layer grown by MOMBE has a high dielectric constant (k=18-19). The growth rate is affected by various process variables such as substrate temperature, bubbler temperature, Ar, and $O_2$ gas flows.

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Reactive RF Magnetron Sputter Deposited $Y_2O_3$ Films as a Buffer Layer for a MFIS Transistor

  • Lim, Dong-Gun;Jang, Bum-Sik;Moon, Sang-Il;Junsin Yi
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.47-50
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    • 2000
  • This paper investigated structural and electrical properties of $Y_2$ $O_3$ as a buffer layer of single transistor FRAM (ferroelectric RAM). $Y_2$ $O_3$ buffer layers were deposited at a low substrate temperature below 40$0^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post-annealing temperature, and suppression of interfacial $SiO_2$ layer generation. For a well-fabricated sample, we achieved that leakage current density ( $J_{leak}$) in the order of 10$^{-7}$ A/$\textrm{cm}^2$, breakdown electric field ( $E_{br}$ ) about 2 MV/cm for $Y_2$ $O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_2$ $O_3$/Si as low as 8.72x1010 c $m^{-2}$ e $V^{-1}$ . The low interface states were obtained from very low lattice mismatch less than 1.75%.

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Formation of amorphous Ga2O3 thin films on Ti metal substrates by MOCVD and characteristics of diodes (MOCVD에 의한 Ti 금속 기판 위의 비정질 Ga2O3 박막 형성과 다이오드 특성)

  • Nam Jun Ahn;Jang Beom An;Hyung Soo Ahn;Kyoung Hwa Kim;Min Yang
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.33 no.4
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    • pp.125-131
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    • 2023
  • Ga2O3 thin films were deposited on Ti substrates using metal organic chemical vapor deposition (MOCVD) at temperatures ranging from 350 to 500℃. Lower deposition temperatures were chosen to minimize thermal deformation of the Ti substrate and its impact on the Ga2O3 film. Film surfaces tended to become rough at temperatures below 500℃ due to three-dimensional growth, but the film formed at 500℃ had the most uniform surface. All deposited films were amorphous in structure. Vertical Schottky diodes were fabricated and I-V and C-V measurements were performed. I-V measurements showed higher operating voltages compared to a typical SBD for films grown at different temperatures. The sample grown at 500℃, which had the most uniform surface, exhibited the lowest operating voltage. Higher growth temperatures resulted in higher capacitance values according to C-V measurements.