• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1996.11a
• /
• pp.203-206
• /
• 1996

In order to investigate the infulence of sodium chloride on the volume resistivity characteristics of transformer oils in temperature range of 20~100[$^{\circ}C$] were made researches. The geometrical capacitance of electrode with coaxial cylindrical shape for measuring the volume resistivity was 16[pF], and hoghmegaohm meter model VMG-1000 was used, the applying voltage were DC 100, 250, 500 and 1000[V]. The classification for the physical properties of specimen by FTIR Spectroscopy was carried out. AS a result of experiment, the value for volume resistivity is increased with sodium chloride contents.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.11a
• /
• pp.313-316
• /
• 2003

The lead zirconate titanate, $Pb(Zr_{0:52}Ti_{0:48})O_3$, films of $0.5\;{\mu}m,\;1\;{\mu}m$ and $2\;{\mu}m$ thickness were fabricated on $Pt/Ti/SiO_2/Si$ substrate by the rf magnetron sputtering method. The PZT films were annealed using by a rapid thermal annealing (RTA) method. The thickness dependence of the film structure, dielectric properties, Polarization-electric field hysteresis loops and capacitance-voltage characteristics were investigated over the thickness range of $0.5\;{\mu}m,\;1\;{\mu}m$ and $2\;{\mu}m$. According to the XRD patterns of the films, (110) peak intensity increases with film thickness increased. The increase of PZT films thickness leads to the decrease of the remanent polarization and the dielectric constant.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1993.11a
• /
• pp.17-20
• /
• 1993

In this paper, the (1-x)($Sr_{0.50}$$Pb_{0.25}$$Ba_{0.25}$)$TiO_3$-x $Bi_2$$Ti_3$$O_{9}$(x=0,4,6,8[mol.%]) ceramics with paraelectric properties were, fabricated by mixed oxide method. The dielectric and structural properties of ceramics were studied with sintering temperature and addition of $Bi_2Ti_3O_{9}$, and the application for the high - voltage capacitor was investigated. In the specimens with sintering at 1350[$^{\circ}C$], sintered density was showed the highest value of 5.745[g/cm$^3$]. Increasing of sintering temperature, average grain size was increased. The specimen. ($Sr_{0.50}$$Pb_{0.25}$$Ba_{0.25}$)$TiO_3$sintered at 1350[$^{\circ}C$] showed good dielectric properties and breakdown voltage was showed the highest value of 200[kV]. Temperature coefficient of capacitance was stabilized in specimens added $Bi_2Ti_3O_{9}$ Sintered density. dielectric properties and breakdown voltage ware decreased with increasing the contents of $Bi_2Ti_3O_{9}$.

• Journal of IKEEE
• /
• v.22 no.4
• /
• pp.1025-1030
• /
• 2018

The proposed modulator is designed by utilizing a conventional structure employing time division technique to realize the 4th order delta-sigma modulator using one op-amp. In order to reduce the influence of KT/C noise, the capacitance in the first and second integrators reused was chosen to be 20pF and capacitance of third and fourth integrators was designed to be 1pF. The stage variable technique in the low power reconfigurable op-amp was used to solve the stability issue due to different capacitance loads for the reduction of KT/C noise. This technique enabled the proposed modulator to reduce the power consumption of 15% with respect to the conventional one. The proposed modulator was fabricated with 0.18um CMOS N-well 1 poly 6 metal process and consumes 305uW at supply voltage of 1.8V. The measurement results demonstrated that SNDR, ENOB, DR, FoM(Walden), and FoM(Schreier) were 66.3 dB, 10.6 bits, 83 dB, 98 pJ/step, and 142.8 dB at the sampling frequency of 256kHz, oversampling ratio of 128, clock frequency of 1.024 MHz, and input frequency of 250 Hz, respectively.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.52 no.4
• /
• pp.159-163
• /
• 2003

ln this work, we studied electrical characteristics and leakage current mechanism of $Ta_2O_{5}$ MOS(Metal-Oxide-Semiconductor) devices. $Ta_2O_{5}$ thin film (63 nm) was deposited by ALD(Atomic Layer Deposition) method at temperature of 235 $^{\circ}C$. The structures of the $Ta_2O_{5}$ thin films were examined by XRD(X-Ray Diffraction). From XRD, it is found that the structure of $Ta_2O_{5}$ is single phase and orthorhombic. From capacitance-voltage (C-V) anaysis, the dielectric constant was 19.4. The temperature dependence of current density-electric field (J-E) characteristics of $Ta_2O_{5}$ thin film was studied at temperature range of 300 - 423 K. In ohmic region (<0.5 MV/cm), the resistivity was 2.456${\times}10^{14}$ ($\omega{\cdot}cm$ at 348 K. The Schottky emission is dominant at lower temperature range from 300 to 323 K and Poole-Frenkel emission is dominant at higher temperature range from 348 to 423 K.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.127-127
• /
• 2011

전하 트랩형 비휘발성 메모리는 10년 이상의 데이터 보존 능력과 빠른 쓰기/지우기 속도가 요구 된다. 그러나 두 가지 특성은 터널 산화막의 두께에 따라 서로 trade off 관계를 갖는다. 즉, 두 가지 특성을 모두 만족 시키면서 scaling down 하기는 매우 힘들다. 이것의 해결책으로 적층된 유전막을 터널 산화막으로 사용하여 쓰기/지우기 속도와 데이터 보존 특성을 만족하는 Tunnel Barrier engineered Memory (TBM)이 있다. TBM은 가운데 장벽은 높고 기판과 전극쪽의 장벽이 낮은 crested barrier type이 있으며, 이와 반대로 가운데 장벽은 낮고 기판과 전극쪽의 장벽이 높은 VARIOT barrier type이 있다. 일반적으로 유전율과 밴드갭(band gap)의 관계는 유전율이 클수록 밴드갭이 작은 특성을 갖는다. 이러한 관계로 인해 일반적으로 crested type의 터널 산화막층은 high-k/low-k/high-k의 물질로 적층되며, VARIOT type은 low-k/high-k/low-k의 물질로 적층된다. 이 형태는 밴드갭이 다른 물질을 적층했을 때 전계에 따라 터널 장벽의 변화가 민감하여 전자의 장벽 투과율이 매우 빠르게 변화하는 특징을 갖는다. 결국 전계에 민감도 향상으로 쓰기/지우기 속도가 향상되며 적층된 유전막의 물리적 두께의 증가로 인해 데이터 보존 특성 또한 향상되는 장점을 갖는다. 본 연구에서는 SiO2/Al2O3 (2/3 nm)와 SiO2/HfAlO (2/3 nm)의 이중 터널 산화막을 증착 시킨 MIS capacitor를 제작한 후 터널 산화막에 전하가 트랩되는 것을 피하기 위하여 다양한 열처리 온도에 따른 current-voltage (I-V), capacitance-voltage (C-V), constant current stress (CCS) 특성을 평가하였다. 급속열처리 공정온도는 600, 700, 800, 900 ${^{\circ}C}$에서 진행하였으며, 낮은 누설전류, 터널링 전류의 증가, 전하의 트랩현상이 최소화되는 열처리 공정의 최적화 실험을 진행하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2000.11a
• /
• pp.405-408
• /
• 2000

We designed and fabricated VCO using inductive reactance variation at 2GHz. A varactor diode is one of the main devices in VCO, which varies capacitance depending on reverse voltage. In this paper, a varactor diode is not used as a variable capacitive reactance device but as an inductive device. The circuit design and simulation have been carried out using HP-MDS. The fabricated VCO is measured using the HP 8532B spectrum analyzer and the HP 4352B VCO/PLL analyzer. The experimental result shows the phase noise -110dBc/Hz at a 100kHz offset frequency, the control voltage sensitivity of 23MHz/V and a -3.5dBm output power with a D.C. current consumption of 5.9mA. The simulation and measurements show exact agreement except with regard to the oscillation frequency. The measured oscillation frequency is lower than the simulation result because there is some parasitic inductance in the PCB layout.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.433-433
• /
• 2007

In this paper, we investigated the feasibility of applying ZnO:Al films to display devices as transparent electrodes, and reported the electro-optical (EO) characteristics of VA cells using ZnO:Al electrodes and compared them with those of VA cells using ITO electrodes. The experiment results show that a uniform vertical LC alignment and a large pretilt angle were achieved. Also, the good voltage-transmittance curve, response time, and capacitance-voltage characteristics were observed for the rubbing aligned VA-LCD using ZnO:Al electrodes m comparison with ITO electrodes. In other words, the vertical alignment mode based on the ZnO:Al electrodes showed appropriate electro-optical characteristics and high transparency in comparison with that based on the ITO electrodes. These results indicated that the transparent ZnO:Al electrodes of the liquid crystal displays could substitute the ITO electrodes.

• Transactions on Electrical and Electronic Materials
• /
• v.17 no.4
• /
• pp.183-188
• /
• 2016

This paper presents the design and characterization of wide band ohmic microswitch with an actuation voltage as low as 20~25 V, and a restoring force of 14.1 μN. The design of the proposed switch is primarily composed of an electrostatic actuator, bridge membrane, cantilever (beam) and coplanar waveguide, suspended over the substrate. The analysis shows an insertion loss of −0.002 dB at 1GHz and remains as low as −0.35 dB, even at 100 GHz. The isolation loss of the switch is sustained at −21.09 dB at 100GHz, with a peak value of −99.58 dB at 1 GHz and up-state capacitance of 4 fF. To our knowledge, this is the first demonstration of a series contact switch, which works over a wide bandwidth (DC-100 GHz) and with such a high and sustained isolation, even at high frequencies and with an excellent figure of merit (f_c=1/2.pi.Ron.Cu= 39.7 THz).

• Electrical & Electronic Materials
• /
• v.16 no.9
• /
• pp.63.2-64
• /
• 2003

Epitaxial yttrium-stabilized HfO$_2$ thin films were deposited on p-type (100) Si substrates by pulsed laser deposition at a relatively lower substrate temperature of 550. Transmission electron microscopy observation revealed a fixed orientation relationship between the epitaxial film and Si; that is, (100)Si.(100)HfO$_2$ and [001]Si/[001]HfO$_2$. The film/Si interface is not atomically flat, suggesting possible interfacial reaction and diffusion, X-ray photoelectron spectrum analysis also revealed the interfacial reaction and diffusion evidenced by Hf silicate and Hf-Si bond formation at the interface. The epitaxial growth of the yttrium stabilized HfO$_2$ thin film on bare Si is via a direct growth mechanism without involoving the reaction between Hf atoms and SiO$_2$ layer. High-frequency capacitance-voltage measurement on an as-grown 40-A yttrium-stabilized HfO$_2$ epitaxial film yielded an dielectric constant of about 14 and equivalent oxide thickness to SiO$_2$ of 12 A. The leakage current density is 7.0${\times}$ 10e-2 A/$\textrm{cm}^2$ at 1V gate bias voltage.