• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1309-1311
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• 2001

본 논문은 Substrate의 온도를 $200(^{\circ}C)$로 유지하며 진공 저항 가열 증착법을 이용하여 ITO/Si 태양전지를 제작한 후 그 전기적 특성을 조사하였다. 전지의 단락전류와 개방전압의 열처리 온도의존성은 약 $450(^{\circ}C)$이상부터 증가하여 $650(^{\circ}C)$부근에서 최대치를 나타내었다. 단락전류와 열처리 시간과의 관계에서는 증착 시간이 15분 정도에서 최대치를 나타내었다. 일정한 태양에너지 조도 하에서 $SnO_2$의 성분비율을 높여감에 따라 전지의 개방전압과 단락전류는 다소 감소한 후 일정한 값으로 안정되는 경향을 나타내었다.

• Proceedings of the KIEE Conference
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• 2001.07e
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• pp.40-42
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• 2001

본 논문은 Substrate의 온도를 200[$^{\circ}C$]로 유지하며 진공 저항 가열 증착법을 이용하여 ITO/Si 태양전지를 제작한 후 그 전기적 특성을 조사하였다. 전지의 단락전류와 개방전압의 열처리 온도의존성은 약450[$^{\circ}C$]이상부터 증가하여 650[$^{\circ}C$]부근에서 최대치를 나타내었다. 단락전류와 열처리 시간과의 관계에서는 증착시간이 15분 정도에서 최대치를 나타내었다. 일정한 태양에너지 조도 하에서 $SnO_2$의 성분비율을 높여감에 따라 전지의 개방전압과 단락전류는 다소 감소한 후 일정한 값으로 안정되는 경향을 나타내었다.

• Korean Journal of Materials Research
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• v.29 no.11
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• pp.720-726
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• 2019

Recently, research on cost reduction and efficiency improvement of crystalline silicon(c-Si) photovoltaic(PV) module has been conducted. In order to reduce costs, the thickness of solar cell wafers is becoming thinner. If the thickness of the wafer is reduced, cracking of wafer may occur in high temperature processes during the c-Si PV module manufacturing process. To solve this problem, a low temperature process has been proposed. Conductive paste(CP) is used for low temperature processing; it contains Sn57.6Bi0.4Ag component and can be electrically combined with solar cells and ribbons at a melting point of $150^{\circ}C$. Use of CP in the PV module manufacturing process can minimize cracks of solar cells. When CP is applied to solar cells, the output varies with the amount of CP, and so the optimum amount of CP must be found. In this paper, in order to find the optimal CP application amount, we manufactured several c-Si PV modules with different CP amounts. The amount control of CP is fixed at air pressure (500 kPa) and nozzle diameter 22G(outer diameter 0.72Ø, inner 0.42Ø) of dispenser; only speed is controlled. The c-Si PV module output is measured to analyze the difference according to the amount of CP and analyzed by optical microscope and Alpha-step. As the result, the optimum amount of CP is 0.452 ~ 0.544 g on solar cells.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.59-65
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• 2012

A study on the electrical characteristic analysis of solar cell diodes under experimental conditions of varying temperature and frequency has been conducted. From the current-voltage (I-V) measurements, at the room temperature, we obtained the ideality factor (n) for Space Charge Region (SCR) and Quasi-Neutral Region (QNR) of 3.02 and 1.76, respectively. Characteristics showed that the value of n (at SCR) decreases with rising temperature and n (at QNR) increases with the same conditions. These are due to not only the sharply increased SCR current flow but the activated carrier recombination in the bulk region caused by defects such as contamination, dangling bonds. In addition, from the I-V measurements implemented to confirm the junction uniformity of cells, the average current dispersion was 40.87% and 10.59% at the region of SCR and QNR, respectively. These phenomena were caused by the pyramidal textured junction structure formed to improve the light absorption on the device's front surface, and these affect to the total diode current flow. These defect and textured junction structure will be causes that solar cell diodes have non-ideal electrical characteristics compared with general p-n junction diodes. Also, through the capacitance-voltage (C-V) measurements under the frequency of 180 kHz, we confirmed that the value of built-in potential is 0.63 V.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.322-322
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• 2010

Recently, anti-reflective films (AR) are one of the most studied parts of a solar cell since these films improve the efficiency of photovoltaic devices. Also, anti-reflection films on the textured silicon solar cells reduce the amount of reflection of the incident light, which improves the device performance due to light trapping of incident light into the cell. Therefore, we preformed two step processes to get textured Si (100) substrate in this experiment. Pyramid size of textured silicon had approximately $2{\sim}9\;{\mu}m$. A well-textured silicon surface can lower the reflectance to 10%. For more reduced reflection, TiO2 anti-reflection films on the textured silicon were deposited at $600^{\circ}C$ using titanium tetra-isopropoxide (TTIP) as a precursor by metal-organic chemical vapor deposition (MOCVD), and the deposited TiO2 layers were then treated by annealing for 2 h in air at 600 and $1000^{\circ}C$, respectively. In this process, the treated samples by annealing showed anatase and rutile phases, respectively. The thickness of TiO2 films was about $75{\pm}5\;nm$. The reflectance at specific wavelength can be reduced to 3% in optimum layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.149-149
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• 2010

The double-layer antireflection (DLAR) coatings have significant advantages over single-layer antireflection (SLAR) coatings. This is because they will be able to cover a broad range of the solar spectrum which would enhance the overall performance of solar cells. Moreover films deposited at high frequency are expected to show excellent and UV-stable passivation in the refractive index that we adopted. In this work, we present a novel DLAR coating using SiNx:H thin films with refractive indices 1.9 and 2.3 as the top and bottom layers. This approach is cost effective when compared to earlier DLAR coatings with two different materials. SiNx:H films were deposited by Plasma enhanced chemical vapor deposition (PECVD) technique using $SiH_4$, $NH_3$ and $N_2$ gases with flow rates 20~80sccm, 200sccm and 85 sccm respectively. The RF power, plasma frequency and substrate temperature for the deposition were 300W, 13.56 MHz and $450^{\circ}C$, respectively. The optimum thickness and refractive indices values for DLAR coatings were estimated theoretically using Macleod simulation software as 82.24 nm for 1.9 and 68.58 nm for 2.3 respectively. Solar cells were fabricated with SLAR and DLAR coatings of SiNx:H films and compared the cell efficacy. SiNx:H> films deposited at a substrate temperature of $450^{\circ}C$ and that at 300 W power showed best effective minority carrier lifetime around $50.8\;{\mu}s$. Average reflectance values of SLAR coatings with refractive indices 1.9, 2.05 and 2.3 were 10.1%, 9.66% and 9.33% respectively. In contrast, optimized DLAR coating showed a reflectance value as low as 8.98% in the wavelength range 300nm - 1100nm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.110-111
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• 2009

상온에서 밴드갭이 2.42 eV의 에너지를 가지며 직접 에너지 밴드갭을 갖는 고감도의 광전도체로 태양전지의 광투과 물질로 각광을 받고 있으며 광전도 cell로 연구되고 있는 CdS(Cadmium sulfide)를 용액 성장법(CBD)으로 제조하여 박막의 결정립의 향상과 박막내의 결함 등을 제거하기 위해 RTP(Rapid Thermal Process)를 이용하여 열처리 분위기 $N_2$, 처리시간 10분을 기준으로 열처리온도 ($300\;^{\circ}C$, $400\;^{\circ}C$, $500\;^{\circ}C$)를 변화시키며 박막의 전기적, 광학적 특성을 조사하였다. 캐리어 밀도가 급격히 낮아지고 이동도가 증가한 $500\;^{\circ}C$에서 $1.29\times10^3\;{\Omega} m$ 비저항을 나타냈다. 가시광선 영역에서 76.28%의 투과율을 보이는 특성을 나타내었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.320.1-320.1
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• 2013

We have investigated the effect of surface passivation for crystalline silicon solar cell using ozone-based atomic layer deposited (ALD) $Al_2O_3$. We examined passivation properties such as uniformity, carrier lifetime, thickness, negative fixed charge density at AlOx/Si interface, and reflectance. The influences of process temperature and heat treatment were investigated using microwave photoconductance decay (PCD). Ozone-based ALD $Al_2O_3$ film shows the best carrier lifetime at lower deposition temperature than $H_2O$-based ALD.

• Journal of the Korean Solar Energy Society
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• v.39 no.3
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• pp.9-17
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• 2019

Laser cutting cell of solar cells can achieve high voltage and efficiency through more array than conventional 6 inch cell compared to same area. In this study, we fabricated c-Si cutting cell with various lasers and laser conditions such as power, speed, and number of times. In the case of picosecond laser, excellent surface characteristics were obtained due to small surface defects and low thermal damage at the output of 20W and the speed of 100 mm/s. However, it is not possible to fabricate a cutting cell having good characteristics due to nonuniform cutting inside the wafer when the processing for forming a cutting cell is not sufficiently performed. For nanosecond lasers, the best wafer characteristics were obtained for fabrication of excellent cutting cells at a frequency of 500 kHz and a laser speed of 100 mm/s. However, the nanosecond laser has not been processed sufficiently in the condition of a number of times. As a result, it was confirmed that the wafer thickness was cut by $63{\mu}m$ of the cell thickness of $170{\mu}m$ in the condition of five times of laser process. It was found that more than 30% of the wafer thickness had to be processed to fabricate the cutting cell. After cutting the 6-inch cell having the voltage of 0.65 V, we obtained the voltage of about 0.63 V.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.322-322
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• 2010

For boron doping on n-type silicon wafer, around $1,000^{\circ}C$ doping temperature is required, because of the relatively low solubility of boron in a crystalline silicon comparing to the phosphorus case. Boron doping by fiber laser annealing and lamp furnace heat treatment were carried out for the uniformly deposited p-a-Si:H layer. Since the uniformly deposited p-a-Si:H layer by cluster is highly needed to be doped with high temperature heat treatment. Amorphous silicon layer absorption range for fiber laser did not match well to be directly annealed. To improve the annealing effect, we introduce additional lamp furnace heat treatment. For p-a-Si:H layer with the ratio of $SiH_4:B_2H_6:H_2$=30:30:120, at $200^{\circ}C$, 50 W power, 0.2 Torr for 30 min. $20\;mm\;{\times}\;20\;mm$ size fiber laser cut wafers were activated by Q-switched fiber laser (1,064 nm) with different sets of power levels and periods, and for the lamp furnace annealing, $980^{\circ}C$ for 30 min heat treatment were implemented. To make the sheet resistance expectable and uniform as important processes for the $p^+$ layer on a polished n-type silicon wafer of (100) plane, the Q-switched fiber laser used. In consequence of comparing the results of lifetime measurement and sheet resistance relation, the fiber laser treatment showed the trade-offs between the lifetime and the sheet resistance as $100\;{\omega}/sq.$ and $11.8\;{\mu}s$ vs. $17\;{\omega}/sq.$ and $8.2\;{\mu}s$. Diode level device was made to confirm the electrical properties of these experimental results by measuring C-V(-F), I-V(-T) characteristics. Uniform and expectable boron heavy doped layers by fiber laser and lamp furnace are not only basic and essential conditions for the n-type crystalline silicon solar cell fabrication processes, but also the controllable doping concentration and depth can be established according to the deposition conditions of layers.