• Title/Summary/Keyword: buffer size

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Dependence of reaction temperature on the properties of CdS thin films grown by Chemical Bath Deposition (Chemical Bath Deposition으로 성장한 CdS 박막의 반응온도에 대한 특성)

  • Lee, Ga-Yeon;Yu, Hyeon-Min;Lee, Jae-Hyeong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.805-808
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    • 2010
  • In this paper, CdS thin films, which were widey used window layer of the CdS/CdTe and the CdS/$CuInSe_2$ heterojunction solar cell, were grown by chemical bath deposition, and effects of temperature of reaction solution on the structural properties were investigated. Cadmium acetate and thiourea were used as cadmium and sulfur source, respectively. And ammonium acetate was used as the buffer solution. The reaction velocity was increased with increasing temerature of reaction solution. For temperature <= $85^{\circ}C$, as increasing temperature of solution, deposition rate of CdS films was increased by ion-by-ion reaction in the substrate surface, and the crystallinity of the films was improved. However, for temperature <= $55^{\circ}C$, deposition rate was decreased resulting from smaller Cd2+ ion, and the grain size was decreased.

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Performance Evaluation of a Fat-tree Network with Output-Buffered $a{\times}b$ Switches (출력 버퍼형 $a{\times}b$스위치로 구성된 Fat-tree 망의 성능 분석)

  • 신태지;양명국
    • Journal of KIISE:Information Networking
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    • v.30 no.4
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    • pp.520-534
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    • 2003
  • In this paper, a performance evaluation model of the Fat-tree Network with the multiple-buffered crossbar switches is proposed and examined. Buffered switch technique is well known to solve the data collision problem of the switch network. The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch with output-buffers. Two important parameters of the network performance, throughput and delay, are then evaluated. The proposed model takes simple and primitive switch networks, i.e., no flow control and drop packet, to demonstrate analysis procedures clearly. It, however, can not only be applied to any other complicate modern switch networks that have intelligent flow control but also estimate the performance of any size networks with multiple-buffered switches. To validate the proposed analysis model, the simulation is carried out on the various sizes of Fat-tree networks that uses the multiple buffered crossbar switches. Less than 2% differences between analysis and simulation results are observed.

A Modified-DWRR Cell Scheduling Algorithm improved the QoS of Delay (지연 특성을 개선한 Modified-DWRR 셀 스케쥴링 알고리즘)

  • Gwak, Ji-Yeong;Nam, Ji-Seung
    • The KIPS Transactions:PartC
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    • v.8C no.6
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    • pp.805-814
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    • 2001
  • In this paper, we propose a new scheduling algorithm that guarantees the delay property of real-time traffic, not considered in previous DWRR(Dynamic Weighted Round Robin) algorithm and also transmits non-real-time traffic efficiently. The proposed scheduling algorithm is a variation of DWRR algorithm to guarantee the delay property of real-time traffic by adding cell transmission method based on delay priority. It also uses the threshold to prevent the cell loss of non-real-time traffic due to cell transmission method based on delay priority. Proposed scheduling algorithm may increase some complexity over conventional DWRR scheme because of cell transmission method based on delay priority. However, the consideration of delay priority can minimize cell delay and require less size of temporary buffer. Also, the results of our performance study shows that the proposed scheduling algorithm has better performance than conventional DWRR scheme due to reliable ABR service and congestion avoidance capacity.

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Electrical Properties of Synthesis LSCF Cathode by Modified Oxalate Method (Modified Oxalate Method로 의해 합성한 LSCF Cathode의 전기적 특성)

  • Lee, Mi-Jai;Kim, Sei-Ki;Jung, Ji-Mi;Park, Sang-Sun;Choi, Byung-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.30-31
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    • 2006
  • The LSCF cathode for Solid Oxide Fuel Cell was investigated to develop high performance unit cell at intermediate temperature by modified oxalate method with different electrolyte. The LSCF precursors using oxalic acid, ethanol and $NH_4OH$ solution were prepared at $80^{\circ}C$, and pH was controlled as 2, 6, 7, 8, 9 and 10. The synthesis precursor powders were calcined at $800^{\circ}C$, $1000^{\circ}C$ and $1200^{\circ}C$ for 4hrs. Unit cells were prepared with the calcined LSCF cathode, buffer layer between cathode and each electrolyte that is the LSGM, YSZ, ScSZ and CeSZ. The synthesis LSCF powders by modified oxalate method were measured by scanning electron microscope and X-ray diffraction. The interfacial polarization resistance of cell was characterized by Solatron 1260 analyzer. The crystal of LSCF powders show single phase at pH 2, 6, 7, 8 and 9, and the average particle size was about $3{\mu}m$. The electric conductivity of synthesis LSCF cathode which was calcined at $1200^{\circ}C$ shows the highest value at pH 7. The cell consist of GDC had the lowest interfacial resistance (about 950 S/cm@650) of the cathode electrode. The polarization resistance of synthesis LSCF cathode by modified oxalate method has the value from 4.02 to 7.46ohm at $650^{\circ}C$. GDC among the electrolytes, shows the lowest polarization resistance.

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Optimization of a Double Patching Technique for True Video-on-Demand Services (True VoD 서비스를 위한 더블 패칭 기법의 최적화)

  • Ha, Sook-Jeong;Kim, Jin-Gyu
    • Journal of Korea Society of Industrial Information Systems
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    • v.13 no.1
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    • pp.46-56
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    • 2008
  • Double Patching is a multicasting technique for a VoD system which has been proposed to provide a true VoD service by making clients share a long patching stream as well as a regular stream For subsequent short patching streams, the technique always makes the long patching stream have extra data that will be played back during a double period of a patching window. In this paper, we propose a technique, using the start time of the latest short patching stream, optimizes Double Patching by deleting the useless data included in the long patching stream when the patching window of the long patching stream closes. The mean requirement for the server's bandwidth to provide the true VoD service is used as a performance metric, and the effect of the request inter-arrival time, the size of the client's local buffer and the video length on the mean bandwidth requirement is evaluated. Performance evaluation result shows that the proposed technique optimizes Double Patching in all cases.

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Analytical Models and their Performance Analysis of Superscalar Processors (수퍼스칼라 프로세서의 해석적 모델 및 성능 분석)

  • Kim, Hak-Jun;Kim, Seon-Mo;Choe, Sang-Bang
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.7
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    • pp.847-862
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    • 1999
  • 본 논문에서는 유한버퍼의(finite-buffered) 동기화된(synchronous) 큐잉모델(queueing model)을 이용하여 명령어들간의 병렬성, 분기명령의 빈도수, 분기예측(branch prediction)의 정확도, 캐쉬미스 등의 파라미터들을 고려하여 프로세서의 명령어 실행율을 예측하며 캐쉬의 성능과 파이프라인 성능간의 관계를 분석할 수 있는 새로운 해석적 모델을 제안하였다. 해석적 모델은 모델의 타당성을 검증하기 위해서 시뮬레이션을 수행하여 얻은 결과와 비교하였다. 해석적 모델과 시뮬레이션을 비교한 결과 대부분 10% 오차 내에서 일치하였다. 본 연구를 통하여 얻은 해석적 모델을 사용하면 시뮬레이션에서는 드러나지 않는 성능제약의 원인에 대한 명확한 규명이 가능하기 때문에 성능향상을 위한 설계자료를 얻을 수 있으며, 시스템 성능 밸런스를 위한 캐쉬와 비순차이슈 파이프라인 성능간의 관계에 대한 정확한 분석이 가능하다.Abstract This research presents a novel analytic model to predict the instruction execution rate of superscalar processors using the queuing model with finite-buffer size and synchronous operation mode. The proposed model is also able to analyze the performance relationship between cache and pipeline. The proposed model takes into account various kinds of architectural parameters such as instruction-level parallelism, branch probability, the accuracy of branch prediction, cache miss, and etc.. To prove the correctness of the model, we performed extensive simulations and compared the results with the analytic model. Simulation results showed that the proposed model can estimate the average execution rate accurately within 10% error compared to simulation results. The proposed model can explain the causes of performance bottleneck which cannot be uncovered by the simulation method only. The model is also able to show the effect of the cache miss on the performance of out-of-order issue superscalar processors, which can provide an valuable information in designing a balanced system.

HAMM(Hybrid Address Mapping Method) for Increasing Logical Address Mapping Performance on Flash Translation Layer of SSD (SSD 플래시 변환 계층 상에서 논리 주소 매핑의 성능 향상을 위한 HAMM(Hybrid Address Mapping Method))

  • Lee, Ji-Won;Roh, Hong-Chan;Park, Sang-Hyun
    • The KIPS Transactions:PartD
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    • v.17D no.6
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    • pp.383-394
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    • 2010
  • Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.

Fabrication of Ultramicroelectrodes with Nanoporous Gold Structures by Potentiostatic Anodization (정전위 양극 산화에 의한 나노다공성 금 구조의 초미세 전극 제작)

  • Seoin, Shin;Siyeon, Lee;Jongwon, Kim
    • Journal of the Korean Chemical Society
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    • v.66 no.6
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    • pp.436-441
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    • 2022
  • Because the nanoporous electrodes has large electrochemical surface areas, extensive studies have been focused on their fabrication methods. In this paper, a method for introducing a nanoporous gold (NPG) structure on the surface of an ultramicroelectrode (UME) using potentiostatic anodization was investigated. A well-defined NPG structure was introduced on the surface of the UME when a potential of 1.3 V was applied in 0.1 M phosphate buffer solution (pH 8) containing 1 M KCl. The anodic oxidation efficiency was investigated by observing the effect of the applied potential, the reaction time, and the size of the electrode on the roughness factor (Rf) of the prepared NPG-UMEs. In a short time of about 10 minutes, NPG-UME with a large Rf value of about 2000 could be prepared, which could be effectively used for electrochemical glucose detection. The results shown in this work are expected to have great applicability when performing electrochemical analysis with a small sample volume.

Performance Evaluation of Smoothing Algorithm Considering Network Bandwidth in IoT Environment (IoT 환경에서 네트워크 대역폭을 고려한 스무딩 알고리즘의 성능 평가)

  • Lee, MyounJae
    • Journal of Internet of Things and Convergence
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    • v.8 no.4
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    • pp.41-47
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    • 2022
  • Smoothing is a transmission plan that converts video data stored at a variable bit rate into a fixed bit rate. Algorithms for smoothing include CBA, which aims to minimize the number of transmission rate increases, MCBA, which minimizes the number of transmission rate changes, and MVBA algorithms that minimize the amount of transmission rate change. This paper compares the proposed algorithm with the CBA algorithm with various video data, buffer size, and performance evaluation factors as a follow-up to the proposed smoothing algorithm that minimizes (maximizes) the transmission rate increase (decrease) when the server requires more bandwidth The evaluation factors used were compared with the number of changes in the fps rate, the minimum fps, the average fps, fps variability, and the number of frames to be discarded. As a result of the comparison, the proposed algorithm showed superiority in comparing the number of fps rate changes and the number of frames discarded.

Synthesis, Characterization and Cosmetic Application of Self-Assembled Sericin-PEG Nanoparticle

  • E. S. Choung;S. Y. Eom;Kim, J. H.;Kim, K. S.;Kim, K. H.;Lee, K. G.;Lee, Y. W.;C. S. Cho
    • Proceedings of the SCSK Conference
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    • 2003.09a
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    • pp.501-519
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    • 2003
  • Silk Sericin(SS) is a natural protein extracted from cocoon of bombix mori and shows moisturizing effect to the skin due to a number of hydroxyl groups in the structure. But its application to cosmetics is limited due to its poor solubility in water. In order to solve this drawback and expand its application to cosmetics, polyethyleneglycol(PEG) was conjugated with sericin by reacting activated polyethyleneglycol(ActPEG). Reaction site of sericin is tyrosine residue, which was determined by using $^1$H-NMR. Random coil structure of sericin was transformed to beta-sheet structure by conjugating polyethyleneglycol. It was confirmed that melting point of sericin-PEG conjugate was lowered compared to that of each sericin and PEG due to the interaction between sericin and PEG in crystalline structure. Self-assembled sericin-PEG nanoparticle was obtained by dialyzing with alcohol solution of sericin-PEG conjugate against water. The particle is spherical and has 200-400nm of size. The moisturizing ability of sericin-PEG nanoparticle was much higher than that of sericin itself. Incorporation of vitamin A into sericin-PEG nanoparticle was carried out by diafiltration method. The content of incorporated Vitamin A in sericin-PEG nanoparticle was 8.9 wt%. Releasing behaviour of vitamin A incorporated into nanoparticle was tested in phosphate buffer, pH 7.4 at 37$^{\circ}C$. and half-life of Vitamin A release was 43hrs. Sericin-PEG nanoparticle exhibited higher moisturing effect than sericin itself and distilled water, respectively. No toxicity and irritation were observed in animal tests. It can be expected that the self-assembled sericin-PEG nanoparticle can be developed for cosmetics.

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