• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.108-113
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• 2021

In this paper, a totem pole PFC was structured in two methods with FET and diode for low-speed switch while GaN FET was used for high-speed switch. Internal power loss, power conversion efficiency and steady-state characteristics of the two methods were compared in the totem pole bridgeless PFC circuit which is widely applied in large-capacity and high-efficiency switching rectifier of 500W or more. In order to compare and confirm the steady-state characteristics under equal conditions, a 2kW class totem pole bridgeless PFC was constructed and the experimental results were analyzed. From the experimental results, it was confirmed that the low-speed switch operation has a large difference in efficiency due to the internal conduction loss of the low-speed switch at a low input voltage. Especially, input power factor and load characteristic showed no difference regardless of the low-speed switch operation.

• Journal of Power Electronics
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• v.13 no.4
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• pp.600-608
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• 2013

This paper analyzes the effect of the admittance component for the digitally controlled single-phase bridgeless power factor correction (PFC) converter. To do this, it is shown how the digital delay effects such as the digital pulse-width modulation (DPWM) and the computation delays restrict the bandwidth of the converter. After that, the admittance effect of the entire digital control system is analyzed when the bridgeless PFC converter which has the limited bandwidth is connected to the grid. From this, the waveform distortion of the input current is explained and the compensation method for the admittance component is suggested to improve the quality of the input current. Both the simulations and the experiments are performed to verify the analyses taken in this paper for the 1 kW bridgeless PFC converter prototype.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.363-364
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• 2016

In this paper, a novel bridgeless interleaved power factor correction circuit with single current sensor is proposed. The proposed control strategy requires only one current sensor for the interleaved bridgeless PFC. By sampling the output current, all the boost indictor currents can be calculated and used to control the input current according to the input voltage. The reduced number of current sensors and associated feedback circuits helps reduce the cost of system. The problem caused by the unequal current gain between current sensors inherently does not exist in the proposed topology. Thus, current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. In addition, the proposed technique can be applied to the other kinds of interleaved PFC topologies. Performance of the proposed control strategy is verified by the experimental results with 6.6kW bridgeless interleaved PFC circuit.

• Journal of Power Electronics
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• v.18 no.2
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• pp.323-331
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• 2018

Buck power factor correction (PFC) converters, compared with conventional boost PFC converters, exhibit high efficiency performance in the entire range of universal line voltage. This feature has gotten more attention for eliminating the zero crossing dead angle of buck PFC rectifiers. Furthermore, bridgeless structures for the reduction of conduction losses have been proposed. The aim of this paper is to introduce a single-phase buck rectifier that simultaneously has unity power factor (PF) and bridgeless structure while operating in the continuous conduction mode (CCM). For this purpose, two auxiliary flyback converters without any active switches are applied to a bridgeless buck rectifier to eliminate the zero crossing dead angle and achieve unity power factor, low total harmonic distortion (THD) and high efficiency. The operation and design considerations of the proposed rectifier are verified on a 150W, 48V prototype using a conventional peak-current-mode control. The measurement results show that the proposed rectifier has nearly unity power factor, THD less than 7% and high efficiency.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.151-152
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• 2012

본 논문은 전기자동차의 탑재형 충전기 (OBC, On-Board Charger)에 적용 가능한 고효율 역률개선회로 (PFC, Power Factor Correction Circuit)들의 손실을 분석한다. 평균전류모드제어를 이용하여 conventional boost PFC, interleaved boost PFC, semi-bridgeless PFC, totem pole PFC, seudo totem pole PFC, back-to-back bridgeless PFC, interleaved bridgeless PFC 등 7개의 토폴로지를 3.3kW OBC 기반으로 설계하고, 각 토폴로지의 손실을 수식과 PSIM의 thermal module을 이용하여 분석한다. 분석한 결과를 토대로 제시한 토폴로지들의 효율 및 성능을 비교한다.

• Journal of Power Electronics
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• v.9 no.5
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• pp.708-717
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• 2009

In this paper a new zero voltage transition PWM bridgeless PFC is introduced. The auxiliary circuit provides soft switching condition for all semiconductor devices. Also, in the resonant path of the auxiliary circuit, only two semiconductor devices exist. Therefore the resonant conduction losses are low. Furthermore, the auxiliary circuit semiconductor elements consist of only one diode and one switch. The proposed auxiliary circuit is applied to a bridgeless PFC converter to further reduce conduction and switching losses. In this paper, the operating modes of this converter are explained and the resulting ideal and simulation waveforms are shown. The presented experimental results justify the theoretical analysis.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.26-27
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• 2010

기존의 역률 보상 회로(PFC 회로)는 저전압 입력 시에 정류 다이오드의 도통손실 증가로 인해 효율 상승에 제약을 받는다. Bridgeless PFC 컨버터는 입력 측의 정류 다이오드 없이 능동 스위치가 정류 동작을 수행하도록 하여 더 높은 효율을 얻을 수 있다. 본 논문에서는 고효율을 위한 새로운 절연형 bridgeless PFC 컨버터를 제안한다. 제안한 회로는 입력단의 정류 다이오드를 제거함으로써 도통 손실을 줄여 효율 향상을 꾀하였다. 또한 변압기를 사용하여 입출력 전압 이득 설계를 자유롭게 하였으며, 2차 DC/DC 컨버터 설계 시 절연이 필요하지 않도록 하였다. 제안한 회로의 성능을 65W급 프로토타입 컨버터의 실험을 통해 검증하였다.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.4
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• pp.449-455
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• 2019

This paper proposes a flyback diode of bridgeless PFC converter as SiC SBD (Schottky Barrier Diode) to achieve high efficiency. In addition, through the explanation of the operation principle of the bridgeless PFC converter, the conduction section of the freewheel diode is shown in the bridgeless PFC converter to verify the contribution of system loss due to the loss of the freewheel diode. The advantages of the SiC SBD device's physical properties and the reverse recovery characteristics are explained, and the efficiency is measured by measuring the turn-on and turn-off losses. The loss was calculated. The simulation results were calculated in consideration of device characteristics and verified through the waveform analysis and comparison of the actual system. In order to consider the device characteristics, the simulation was conducted using the thermal module of PSIM. As a result of the prototype test, the turn-on loss was 0.608W and the turn-off loss was 21.62W, resulting in the total switching loss of 22.228W. The comparison of the two results proved the validity of the experimental method. In addition, a high efficiency of 94.58% is achieved.

• Journal of Power Electronics
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• v.14 no.5
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• pp.815-826
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• 2014

An improved bridgeless interleaved boost power factor correction (PFC) rectifier to improve power efficiency and component utilization is proposed in this study. With combined conventional bridgeless PFC circuit and interleaved technology, the proposed rectifier consists of two interleaved and magnetic inter-coupling boost bridgeless converter cells. Each cell operates alternatively in the critical conduction mode, which can achieve the soft-switching characteristics of the switches and increase power capacity. Auxiliary blocking diodes are employed to eliminate undesired circulating loops and reduce current-sensing noise, which are among the serious drawbacks of a dual-boost PFC rectifier. Magnetic component utilization is improved by symmetrically coupling two inductors on a unique core, which can achieve independence from each other based on the auxiliary diodes. Through the interleaved approach, each switch can operate in the whole line cycle. A simple control scheme is employed in the circuit by using a conventional interleaved controller. The operation principle and theoretical analysis of the converter are presented. A 600 W experimental prototype is built to verify the theoretical analysis and feasibility of the proposed rectifier. System efficiency reaches 97.3% with low total harmonic distortion at full load.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.24-25
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• 2017

In this paper, a low cost bridgeless interleaved power factor correction topology for electric vehicle charger application is proposed. With the proposed topology the number of switches, inductors, current sensors and associated circuits can be reduced, thereby reducing the cost of the system as compared to the conventional bridgeless PFC circuit. The reduced input current ripple by the proposed interleaved topology makes it suitable for high power applications such as electric vehicle chargers since it can reduce the size of the inductor core and the Electro Magnetic Interference (EMI) problem. In the proposed topology only one current sensor is required. All the boost inductor currents can be reconstructed by sampling the output current and used to control the input current. Therefore the typical problem caused by the unequal current gain of each current sensor inherently does not exist in the proposed topology. In addition the current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. The performance of the proposed converter is verified by the experimental results with a prototype of 6.6kW bridgeless interleaved PFC circuit.