• Journal of the Korea Society of Computer and Information
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• v.10 no.2 s.34
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• pp.1-10
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• 2005

In this Paper, we propose a new block matching a1gorithm that extracts motion vectors from consecutive range data. The proposed method defines a matching metric that integrates intensity, hue, and range. Our algorithm begins matching with a small matching template. If the matching degree is not good enough, we slightly expand the size of a matching template and then repeat the matching process until our matching criterion is satisfied or the predetermined maximum size has been reached. As the iteration proceeds, we adaptively adjust weights of the matching metric by considering the importance of each feature. In the experiments, we show that our block matching approach can work as a promising solution by comparing the proposed method with previously known method in terms of performance.

• Proceedings of the KSRS Conference
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• 2008.10a
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• pp.104-106
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• 2008

This paper proposes an image based method for arranging ship blocks in a dockyard. The problem of appropriately arranging numerous blocks has to be carefully planned because it has close relation to the effectiveness of the whole working process. To implement the system, the block shape and feature points have to be obtained from block image. The block arrangement system can be implemented by the fusion of the block shape extraction and image matching technology.

• Journal of the Korean Institute of Intelligent Systems
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• v.14 no.4
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• pp.418-423
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• 2004

The motion estimation algorithm based block matching is a widely used in the international standards related to video compression, such as the MPEG series and H.26x series. Full search algorithm(FA) ones of this block matching algorithms is usually impractical because of the large number of computations required for large search region. Fast search algorithms and conventional binary block matching algorithms reduce computational complexity and data processing time but this algorithms have disadvantages that is less performance than full search algorithm. This paper presents new Boolean matching algorithm, called BCBM(Bit Converted Boolean Matching). Proposed algorithm has performance closed to the FA by Boolean only block matching that may be very efficiently implemented in hardware for real time video communication. Simulation results show that the PSNR of the proposed algorithm is about 0.08㏈ loss than FA but is about 0.96∼2.02㏈ gain than fast search algorithm and conventional Boolean matching algorithm.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.36T no.3
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• pp.32-40
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• 1999

In this paper, we present a fast block matching motion estimation algorithm based on successive elimination algorithm (SEA). Based on the characteristic of center-biased motion vector distribution in the search area, the proposed method improves the performance of the SEA with a reduced the number of the search positions in the search area, In addition, to reduce the computational load, this method is combined with both the reduced bits mean absolute difference (RBMAD) matching criterion which can be reduced the computation complexity of pixel comparison in the block matching and pixel decimation technique which reduce the number of pixels used in block matching. Simulation results show that the proposed method provides better performance than existing fast algorithms and similar to full-search block motion estimation algorithm.

• The KIPS Transactions:PartB
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• v.11B no.6
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• pp.633-644
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• 2004

In this paper, we notice that the original NTSS algorithm can be proposed as the NTSS-3 Level algorithm by the multi-resolution technique. The fast block matching algorithm affects the speed by the patten combination and this paper proposes the block matching algorithm in different levels by multi-resolution technique, quite different from the original NTSS Patten. The block matching algorithm requires the multi-candidate to reduce the occurrence of low-image quality by the local minima problem. The simulation result compared to FS shows search speed 16 times quicker, and the PSNR 0.11-0.12［dB］ gets improved Image quality compared to the original fast block matching algorithm NTSS, and the speed is improved up to 0.1 times for improved image by the search point portion.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.6
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• pp.1361-1369
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• 1996

Motion estimation is one of the key components for high quality video coding. In this paper, a new motion estimation scheme for MPEG-like video coder is suggested. The proposed temporally adaptive motion estimation scheme consists of five functional blocks: Temporal subband analysis (TSBA), extraction of temporal information, scene change detection (SCD), picture type replacement (PTR), and temporally adapted block matching algorithm (TABMA). Here all the functional components are based on the temporal subband analysis. In this papre, we applied the analysis part of subband decompostion to the temporal axis of moving picture sequence, newly defined the temporal activity distribution (TAD) and average TAD, and proposed the temporally adapted block matching algorithm, the scene change detection algorithm and picture type replacement algorithm which employed the results of the temporal subband analysis. A new block matching algorithm TABMA is capable of controlling the block matching area. According to the temporal activity distribution of objects, it allocates the search areas nonuniformly. The proposed SCD and PTR can prevent unavailable motion prediction for abrupt scene changes. Computer simulation results show that the proposed motion estimation scheme improve the quality of reconstructed sequence and reduces the number of block matching trials to 40% of the numbers of trials in conventional methods. The TSBA based scene change detection algorithm can detect the abruptly changed scenes in the intentionally combined sequence of this experiment without additional computations.

• ETRI Journal
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• v.37 no.4
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• pp.772-779
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• 2015

This paper presents a power-efficient hardware realization for a motion estimation technique that is based on the full-search block matching algorithm (FSBMA). The considered input is the quarter common intermediate format of digital video. The mean of absolute difference (MAD) is the distortion criteria employed for the block matching process. The conventional architecture considered for the hardware realization of FSBMA is that of the shift register-based 2-D systolic array. For this architecture, a conservative approximation technique is adapted to eliminate unnecessary MAD computations involved in the block matching process. Upon introducing the technique to the conventional architecture, the power and complexity of its implantation is reduced, while the accuracy of the motion vector extracted from the block matching process is preserved. The proposed architecture is verified for its functional specifications. A performance evaluation of the proposed architecture is carried out using parameters such as power, area, operating frequency, and efficiency.

• ETRI Journal
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• v.33 no.3
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• pp.401-406
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• 2011

This paper presents a fast block-matching algorithm based on the normalized cross-correlation, where the elimination order is determined based on the gradient magnitudes of subblocks in the current macroblock. Multilevel Cauchy-Schwartz inequality is derived to skip unnecessary block-matching calculations in the proposed algorithm. Also, additional complexity reduction is achieved re-using the normalized cross correlation values for the spatially neighboring macroblock because the search areas of adjacent macroblocks are overlapped. Simulation results show that the proposed algorithm can improve the speed-up ratio up to about 3 times in comparison with the existing algorithm.

• Journal of Korea Multimedia Society
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• v.14 no.10
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• pp.1275-1286
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• 2011

This paper proposes a high speed systolic array architecture for full search block matching algorithm (FBMA). The pixels of the search area for a reference block are input only one time to find the matched candidate block and reused to compute the sum of absolute difference (SAD) for the adjacent candidate blocks. Each row of designed 2-dimensional systolic array compares the reference block with the adjacent blocks of the same row in search area. The lower rows of the designed array get the pixels from the upper row and compute the SAD with reusing the overlapped pixels of the candidate blocks within same column of the search area. This designed array has no data broadcasting and global paths. The comparison with existing architectures shows that this array is superior in terms of throughput through it requires a little more hardware.

• Journal of KIISE:Software and Applications
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• v.27 no.5
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• pp.543-550
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• 2000

An adaptive bit-reduced mean absolute difference (ABRMAD) is presented as a criterion for the block-matching algorithm (BMA) to reduce the complexity of the VLSI Implementation and to improve the processing time. The ABRMAD uses the lower pixel resolution of the significant bits instead of full resolution pixel values to estimate the motion vector (MV) by examining the pixels Ina block. Simulation results show that the 4-bit ABRMAD has competitive mean square error (MSE)results and a half less hardware complexity than the MAD criterion, It has also better characteristics in terms of both MSE performance and hardware complexity than the Minimax criterion and has better MSE performance than the difference pixel counting(DPC), binary block-matching with edge-map(BBME), and bit-plane matching(BPM) with the same number of bits.