• Title/Summary/Keyword: bit line reference scheme

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Performance Comparison of Coherent and Non-Coherent Detection Schemes in LR-UWB System

  • Kwon, Soonkoo;Ji, Sinae;Kim, Jaeseok
    • Journal of Communications and Networks
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    • v.14 no.5
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    • pp.518-523
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    • 2012
  • This paper presents new coherent and non-coherent detection methods for the IEEE 802.15.4a low-rate ultra-wideband physical layer with forward error correction (FEC) coding techniques. The coherent detection method involving channel estimation is based on the correlation characteristics of the preamble signal. A coherent receiver uses novel iterated selective-rake (IT-SRAKE) to detect 2-bit data in a non-line-of-sight channel. The non-coherent detection method that does not involve channel estimation employs a 2-bit data detection scheme using modified transmitted reference pulse cluster (M-TRPC) methods. To compare the two schemes, we have designed an IT-SRAKE receiver and a MTRPC receiver using an IEEE 802.15.4a physical layer. Simulation results show the performance of IT-SRAKE is better than that of the M-TRPC by 3-9 dB.

Development of Embedded Non-Volatile FRAMs for High Performance Smart Cards

  • Lee, Kang-Woon;Jeon, Byung-Gil;Min, Byung-Jun;Oh, Seung-Gyu;Lee, Han-Ju;Lim, Woo-Taek;Cho, Sung-Hee;Jeong, Hong-Sik;Chung, Chil-Hee;Kim, Ki-Nam
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.4
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    • pp.251-257
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    • 2004
  • Nonvolatile FRAMs with a design rule of 0.18 ${\mu}m$ were developed for the high performance smart card. A 1Mb FRAM was embedded in place of an EEPROM and a 64Kb FRAM was embedded in place of a. SRAM. It was confirmed that the FRAMs performed the roles of the EEPROM and SRAM successfully using the asynchronous write/read operation method and the one time programming (OTP) scheme. The cycle time of the FRAM was 10 MHz, which remarkably improved the write performance of the smart card in comparison with that of the conventional smart card with an EEPROM. Additionally, a simple and smart bit-line reference scheme for the future FRAM device having a 1T1C cell type was proposed.

An Efficient Scheme to write a Transmission Schedule using Convergence after Interactive Operations in a Stored Video (대화형 연산 후 수렴을 이용한 저장된 비디오의 효율적인 전송 스케줄 작성 방안)

  • Lee, Jae-Hong;Kim, Seung-Hwan
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.7
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    • pp.2050-2059
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    • 2000
  • In a video-on-Demand(VOD) service, a server has to return to he normal playback quickly at a certain new frame position after interactive operations such as jump or last playback. In this paper, we propose an efficient scheme to write a transmission schedule for a playback restart of a video stream at a new frame position after interactive operations. The proposed scheme is based on convergence characteristics, that is transmission schedules with different playback startup frame position in a video stream meet each other at some frame position. The scheme applies a bandwidth smoothing from a new frame position to a convergence position without considering all remaining frames of a video stream. And then the scheme transmits video dta according to the new schedule from the new frame position to the convergence position, and then transmits the remaining video data according to the reference schedule from the convergence position, and then transmits the remaining video data according to the reference schedule from the convergence position to the last frame position. In this paper, we showed that there existed the convergence position corresponding to nay frame position in a video stream through many experiments based on MPEG-1 bit trace data. With the convergence we reduced the computational overhead of a bandwidth smoothing, which was applied to find a new transmission schedule after interactive operations. Also, storage overhead is greatly reduced by storing pre-calculated schedule information up to the convergence position for each I frame position of a video stream with video data off-line. By saving information on a transmission schedule off-line along with the video data and searching the schedule corresponding to the specified restarting frame position, we expect the possibility of normal playback of a video stream with small tolerable playback startup delay.

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A Proposal On Digital Signature For FAX Document Using DM Algorithm (FAX 문서에 대한 DM 합성 알고리즘을 이용한 디지털 서명의 제안)

  • 박일남;이대영
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.7 no.2
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    • pp.55-72
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    • 1997
  • This paper presents a digital signature scheme for facsimile document which directly embeds a signature onto the document. We use multiple reference lines which have been scanned just before and modify each distance of changing pels both on the reference line specified by key and on the coding line with a single bit of the signature data. The time to take in signature is reduced by spreading of signature. Non-repudiation in origin, the 3rd condition of digital signature is realized by proposed digital signature scheme. The transmitter embeds the signature secretly and transfers it, and the receiver makes a check of any forgery on the signature and the document. This scheme is compatible with the ITU-T.4(CCITT G3 or G4 facsimile standards). The total amount of data transmitted and the image quality are about the same to that of the original document, and thus a third party notices that no signature is embedded on the document.

Management Technique of Energy-Efficient Cache and Memory for Mobile IoT Devices (모바일 사물인터넷 디바이스를 위한 에너지 효율적인 캐시 및 메모리 관리 기법)

  • Bahn, Hyokyung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.2
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    • pp.27-32
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    • 2021
  • This paper proposes an energy-efficient cache and memory management scheme for next-generation IoT devices. The proposed scheme adopts a low-power phase-change memory (PCM) as the main memory of IoT devices, aims at minimizing the write traffic to PCM, which is vulnerable to write operations. Specifically, when a cache block of the last-level cache memory is flushed to main memory, the cache block that causes less writes to PCM is preferentially replaced by tracking the modifications of each cache line that constitutes the cache block. In addition, by considering the reference bit of the cache block and the dirty bit of the cache lines, our scheme reduces the energy consumption without degrading the memory system performances. Through simulations using SPEC benchmarks, it is shown that the proposed scheme reduces the write traffic to PCM by 34.6% on average and the power consumption by 28.9%, without memory performance degradations.

Sensing scheme of current-mode MRAM (전류 방식 MRAM의 데이터 감지 기법)

  • Kim Bumsoo;Cho Chung-Hyung;Hwang Won Seok;Ko Ju Hyun;Kim Dong Myong;Min Kyeong-Sik;Kim Daejeong
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.419-422
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    • 2004
  • A sensing scheme for current-mode magneto-resistance random access memory (MRAM) with a 1T1MTJ cell structure is proposed. Magnetic tunnel junction (MTJ) resistance, which is HIGH or LOW, is converted to different cell currents during READ operation. The cell current is then amplified to be evaluated by the reference cell current. In this scheme, conventional bit line sense amplifiers are not required and the operation is less sensitive to voltage noise than that of voltage-mode circuit is. It has been confirmed with HSPICE simulations using a 0.35-${\mu}m$ 2-poly 4-metal CMOS technology.

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A study on RDM algorithm for document image and application to digital signature (문서화상에 대한 RDM 합성 알고리즘 및 디지틀 서명에의 응용)

  • 박일남;이대영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.12
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    • pp.3056-3068
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    • 1996
  • This papre presents the RDM algorithm for composition of bit. After this, we propose a digital signature scheme for facsimile document using RDM algorithm. We modify the even-odd feature in distance of changing pel between coding line and multiple reference line which have been scanned before, and run-length in coding line. The time to take in signature is reduced by spreading of signature. Non-repudiation in origin, the 3rd condition of digital signature is realized by proposed digital signature scheme. The transmitter embeds the signature secretly and tensfers it, and the receiver makes a check of any forgery on the signature and the document. This scheme is compatible with the ITU-T.4(G3 or G4 facsimile standard). The total amount of data transmitted and the quality of image are about the same to that of the original document, thus a third party does not notics signature embeded on the document.

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A Novel Optimized PWM Method Based on the Selection of Pulse Position (펄스 위치 가변에 의한 취적 PWM 방식)

  • 최익;권순학;송중호;박귀태;황재호
    • The Transactions of the Korean Institute of Power Electronics
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    • v.3 no.1
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    • pp.8-14
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    • 1998
  • This paper describes a novel real-time based optimal Pulse Width Modulation (PWM) method suitable for microprocessor-based PWM inverters. Optimal switching patterns minimizing the performance index corresponding to the distortion between the reference and the controlled output voltages are decided by on-line calculation using the microprocessor-implemented control system. To show the effectiveness of the proposed PWM scheme, digital simulation studies and experiments using a 16-bit single-chip microcontroller (Intel 80C196KC) are performed. The results obtained from these simulation studies and experiments show that the proposed PWM scheme has better performance than the other methods such as the natural PWM and the direct PWM.

Design of the Embedded EPROM Circuits Aiming at Low Voltage Operation (저 전압동작을 위한 내장형 EPROM회로설계)

  • 최상신;김성식;조경록
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.6
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    • pp.421-430
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    • 2003
  • In the embedded system, EPROM is difficult to replace a mask ROM for the applications using battery, because the low voltage characteristic of an EPROM is inferior to that of a mask ROM. In this paper, the new circuits such as a word line voltage hoosier scheme and a sense amplifier without reference input for an embedded EPROM in MCU are proposed. The circuits can detect bit line voltage a predetermined level, which is caused by the degradation of the battery. We fabricated a MCU embedded 32Kbytes EPROM. The proposed circuits well operated at 1.5V supply voltage and thus the low voltage performance was improved by about 30%.