• Title/Summary/Keyword: bias circuit

Search Result 463, Processing Time 0.024 seconds

a-Si Gate Driver with Alternating Gate Bias to Pull-Down TFTs

  • Kim, Byeong-Hoon;Pi, Jae-Eun;Oh, Min-Woo;Tao, Ren;Oh, Hwan-Sool;Park, Kee-Chan
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2009.10a
    • /
    • pp.1243-1246
    • /
    • 2009
  • A novel a-Si TFT integrated gate driver circuit which suppresses the threshold voltage shift due to prolonged positive gate bias to pull-down TFTs, is reported. Negative gate-to-drain bias is applied alternately to the pull-down TFTs to recover the threshold voltage shift. Consequently, the stability of the circuit has been improved considerably.

  • PDF

A Low-Power MPPT Interface for DC-Type Energy Harvesting Sources (DC 유형의 에너지 하베스팅 자원을 활용한 저전력의 MPPT 인터페이스)

  • Jo, Woo-Bin;Lee, Jin-Hee;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2018.10a
    • /
    • pp.35-38
    • /
    • 2018
  • This paper describes a low-power MPPT interface for DC-type energy harvesting sources. The proposed circuit consists of an MPPT controller, a bias generator, and a voltage detector. The MPPT controller consists of an MPG (MPPT Pulse Generator) with a schmitt trigger, a logic gate operating according to energy type (light, heat), and a sample/hold circuit. The bias generator is designed by employing a beta multiplier structure, and the voltage detector is implemented using a bulk-driven comparator and a two-stage buffer. The proposed circuit is designed with $0.35{\mu}m$ CMOS process. The simulation results show that the designed circuit consumes less than 100nA of current at an input voltage of less than 3V and the maximum power efficiency is 99.7%. The chip area of the designed circuit is $1151{\mu}m{\times}940{\mu}m$.

  • PDF

Design of the RLG Current Stabilizer for Attitude Control in the Satellite (저궤도 위성 자세제어용 RLG 전류 안정화 회로 설계)

  • Kim, Eui-Chan;Lee, Heung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.57 no.1
    • /
    • pp.98-101
    • /
    • 2008
  • In this paper, we describe the RLG current stabilizer circuit for attitude control in the satellite. The RLG makes use of the Sagnac effect within a resonant of a HeNe laser. The difference between two discharge currents causes one of the gyro bias errors. The theoretical background and current stabilizer are introduced. It is verified that the circuit designed is applicable to the test of input voltage and temperature.

Analytic Model of Spin-Torque Oscillators (STO) for Circuit-Level Simulation

  • Ahn, Sora;Lim, Hyein;Shin, Hyungsoon;Lee, Seungjun
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.13 no.1
    • /
    • pp.28-33
    • /
    • 2013
  • Spin-torque oscillators (STO) is a new device that can be used as a tunable microwave source in various wireless devices. Spin-transfer torque effect in magnetic multilayered nanostructure can induce precession of magnetization when bias current and external magnetic field are properly applied, and a microwave signal is generated from that precession. We proposed a semi-empirical circuit-level model of an STO in previous work. In this paper, we present a refined STO model which gives more accuracy by considering physical phenomena in the calculation of effective field. Characteristics of the STO are expressed as functions of external magnetic field and bias current in Verilog-A HDL such that they can be simulated with circuit-level simulators such as Hspice. The simulation results are in good agreement with the experimental data.

Design of a Rceiver MMIC for the CDMA Terminal (CDMA 단말기용 수신단 MMIC 설계)

  • 권태운;최재하
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.12 no.1
    • /
    • pp.65-70
    • /
    • 2001
  • This paper presents a Receiver MMIC for the CDMA terminal. The complete circuit is composed of Low Noise Amplifier, Down Conversion Mixer, Intermediate Frequency Amplifier and Bias circuit. The Bias circuit implementation, which allows for compensation for threshold voltage and power supply voltage variation are provided. The proposed topology has high linearity and low noise characteristics. Results of the designed circuit are as follows: Overall conversion gain is 28.5 dB, input IP3 of LNA is 8 dBm, input IP3 of down conversion mixer is 0 dBm and total DC current consumption is 22.1 mA.

  • PDF

Research on PAE of Doherty Amplifier Using Dual Bias Control and PBG Structure (이중 바이어스 조절과 PBG를 이용한 도허티 증폭기 전력 효율 개선에 관한 연구)

  • Kim Hyoung-Jun;Seo Chul-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.17 no.8 s.111
    • /
    • pp.707-712
    • /
    • 2006
  • In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.

Characteristic of Error Amplifier Using OTA (OTA를 이용한 오차 증폭기의 특성)

  • 송재훈;김희준;정원섭;임동빈
    • Proceedings of the IEEK Conference
    • /
    • 2001.06e
    • /
    • pp.185-188
    • /
    • 2001
  • This paper proposes an error amplifier circuit using OTA(Operational Transconductance Amplifier) which is the main constituent element in pulse width modulation circuit. The proposed OTA error amplifier circuit is featured by simple circuit configuration, excellent high frequency characteristics and bias current controlled output. Through the experiment of pulse width modulation circuit, the validity of the operation of the OTA error amplifier circuit is verified.

  • PDF

Design of Temperature Compensation Circuit for W-band Radar Receiver (W-band 레이더 수신기용 온도보상회로 설계)

  • Lee, Dongju;Kim, Wansik;Kwon, Jun-Beom;Seo, Mihui;Kim, Sosu
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.20 no.4
    • /
    • pp.129-133
    • /
    • 2020
  • In this paper, a temperature compensation circuit is presented in order to mitigate gain variability due to temperature in the W-band low-noise amplifier (LNA). The proposed cascode temperature compensation bias circuit automatically controls gate bias voltages of the common-source LNA in order to suppress variations of small-signal gain. The designed circuit was realized in a 100-nm GaAs pHEMT process. The simulated voltage gain of W-band LNA including the proposed bias circuit is >20 dB with gain variability less than ±0.8 dB in the range of temperatures between -35 to 71℃. We expect that the proposed circuit contributes to millimeter-wave receivers for stable performances in radar applications.

A 6-16 GHz GaN Distributed Power Amplifier MMIC Using Self-bias

  • Park, Hongjong;Lee, Wonho;Jung, Joonho;Choi, Kwangseok;Kim, Jaeduk;Lee, Wangyong;Lee, Changhoon;Kwon, Youngwoo
    • Journal of electromagnetic engineering and science
    • /
    • v.17 no.2
    • /
    • pp.105-107
    • /
    • 2017
  • The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

Design of the Low Noise Amplifier and Mixer Using Newly Bias Circuit for S-band (새로운 바이어스 회로를 적용한 S-band용 저잡음 증폭기 및 믹서의 One-Chip 설계)

  • Kim Yang-Joo;Shin Sang-Moon;Choi Jae-Ha
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.16 no.11 s.102
    • /
    • pp.1114-1122
    • /
    • 2005
  • In this paper, the study of a design, fabrication and measurement of the receiver MMIC LNA, mixer for S-band application is described. The LNA is designed by 2-stage common source. The mixer is composed of active LO and RF balun to integrate on a chip and applied a newly proposed bias circuit to compensate the process variations of active devices. The LNA has 15.51 dB-gain and 1.02dB-Noise Figure at 2.1 GHz. The conversion gain of the mixer is -12 dB, IIP3 is approximately 4.25 dBm and port-to-port isolation is over 25 dB. The newly proposed bias circuit is composed of a few FETs and resistors, and can compensate the variation of the threshold voltage by the process variations, temperature changes and etc. The designed chip size is $1.2[mm]\times1.4[mm]$.