• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.11
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• pp.2116-2120
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• 2007

A realization for image distortion correction processing system with DSP processor is presented in this paper. The image distortion correcting algorithm is realized by DSP processor for focusing on more real time processing than image quality. The lens and camera distortion coefficients are processed by the Lookup Tables and the correcting algorithm is applied to reverse mapping method for geometrical transform. The system experimentation results in the processing time about 31.3 msec $720{\times}480$ wide range image, and the image is stable and spontaneous to be about 8.3% average PSNR variation with changing a wide angle.

• Progress in Medical Physics
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• v.11 no.1
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• pp.39-47
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• 2000

In Stereotactic Radiosurgery (SRS), there are three imaging methods of target localization, such as digital subtraction Angiography (DSA), computed tomography (CT), magnetic resonance imaging (MRI). Especially, DSA and MR images have a distortion effect generated by each modality. In this research, image properties of DSA were studied. A first essential condition in SRS is an accurate information of target locations, since high dose used to treat a patient may give a complication on critical organ and normal tissue. Hut previous localization program did not consider distortion effect which was caused by image intensifier (II) of DSA. A neurosurgeon could not have an accurate information of target locations to operate a patient. In this research, through distortion correction, we tried to calculate accurate target locations. We made a grid phantom to correct distortion, and a target phantom to evaluate localization algorithm. The grid phantom was set on the front of II, and DSA images were obtained. Distortion correction methods consist of two parts: 1. Bilinear transform for geometrical correction and bilinear interpolation for gray level correction. 2. Automatic detection method for calculating locations of grid crosses, fiducial markers, and target balls. Distortion was corrected by applying bilinear transform and bilinear interpolation to anterior-posterior and left-right image, and locations of target and fiducial markers were calculated by the program developed in this study. Localization errors were estimated by comparing target locations calculated in DSA images with absolute locations of target phantom. In the result, the error in average with and without distortion correction is $\pm$0.34 mm and $\pm$0.41 mm respectively. In conclusion, it could be verified that our localization algorithm has an improved accuracy and acceptability to patient treatment.

• Korean Journal of Remote Sensing
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• v.37 no.3
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• pp.431-447
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• 2021

Recently, the use of high-resolution satellites is increasing in many areas. In order to supply useful satellite images stably, it is necessary to establish automatic precision geometric correction technic. Geometric correction is the process that corrected geometric errors of satellite imagery based on the GCP (Ground Control Point), which is correspondence point between accurate ground coordinates and image coordinates. Therefore, in the automatic geometric correction process, it is the key to acquire high-quality GCPs automatically. In this paper, we proposed iterative precision geometry correction method. we constructed an image pyramid and repeatedly performed GCP chip matching, outlier detection, and precision sensor modeling in each layer of the image pyramid. Through this method, we were able to acquire high-quality GCPs automatically. we then improved the performance of geometric correction of high-resolution satellite images. To analyze the performance of the proposed method, we used KOMPSAT-3 and 3A Level 1R 8 scenes. As a result of the experiment, the proposed method showed the geometric correction accuracy of 1.5 pixels on average and a maximum of 2 pixels.

• Journal of Chest Surgery
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• v.17 no.4
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• pp.636-643
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• 1984

For the purpose of avoiding postoperative massive pulmonary insufficiency after transannular outflow tract reconstruction in patients with tetralogy of Fallot, we have used monocusp bearing outflow patch since June 1983. Right heart catheterization and pulmonary arteriography were performed in 7 patients among the total 11 patients corrected with monocusp bearing outflow patch during postoperative 14th day to 22nd day. Particular attention was paid to the evaluation of the pulmonary valve competence, and the results were; 1.One patient died of acute renal failure secondary to low cardiac output and the operative mortality was 9.1%. 2.The average PRV/FA ratio was 0.491 and the average systolic pressure gradient between right ventricle and pulmonary artery was 17.7mmHg. The average Qp/Qs was 1.13. 3.Inspite of using monocusp bearing outflow patch, the hemodynamic and pulmonary arteriographic results were unsatisfactory in respect to pulmonary valve competence.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1005-1008
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• 2001

This paper presents average current-mode control AC/DC ZVT(Zero Voltage Transition) Boost Converter. This boost converter perceives feed forward signal of input and feedback signal of output for average current-mode control proposed converter employs active-clamp method for ZVT. This converter gives the good PFC(Power Factor Correction), low line current hormonic distortions and tight output voltage regulations. This converter also has a high efficiency by active-clamp method. The principle of operation, feature, and design considerations are illustrated and verified through the experiment with a 150W, 120kHz prototype converter.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.375-377
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• 2006

A Analog parallel processing-based Viterbi decoder which decodes PRML signal of DVD has been designed by CMOS circuit. The analog processing-based Viterbi decoder implements are functions of the conventional digital Viterbi decoder utilizing the analog parallel processing circuit technology. The Analog parallel processing-based Viterbi decoding technology is applied for the PR(1,2,2,1) signal decoding of DVD. The benefits are low power consumption and less silicon consumption. In this paper, the comparison of the Analog parallel processing-based Viterbi Decoder which has a function of the error correction between Max operation and Average operation is discussed.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.4
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• pp.1296-1309
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• 2023

In this paper, based on the soft cancellation (SCAN) bit-flipping (SCAN-BF) algorithm, a generalized SCAN bit-flipping (GSCAN-BF-Ω) decoding algorithm is carried out, where Ω represents the number of bits flipped or corrected at the same time. GSCAN-BF-Ω algorithm corrects the prior information of the code bits and flips the prior information of the unreliable information bits simultaneously to improve the block error rate (BLER) performance. Then, a joint threshold scheme for the GSCAN-BF-2 decoding algorithm is proposed to reduce the average decoding complexity by considering both the bit channel quality and the reliability of the coded bits. Simulation results show that the GSCAN-BF-Ω decoding algorithm reduces the average decoding latency while getting performance gains compared to the common multiple SCAN bit-flipping decoding algorithm. And the GSCAN-BF-2 decoding algorithm with the joint threshold reduces the average decoding latency further by approximately 50% with only a slight performance loss compared to the GSCAN-BF-2 decoding algorithm.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.5
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• pp.285-292
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• 2014

The commonly used Newton-Raphson's floating-point number divider algorithm performs two multiplications in one iteration. In this paper, a tentative K'th Newton-Raphson's floating-point number divider algorithm which performs K times multiplications in one iteration is proposed. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications per an operation in single precision and double precision divider is derived from many reciprocal tables with varying sizes. In addition, an error correction algorithm, which consists of one multiplication and a decision, to get exact result in divider is proposed. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a floating point number divider unit. Also, it can be used to construct optimized approximate reciprocal tables.

• Journal of Power Electronics
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• v.15 no.3
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• pp.644-651
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• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.306-308
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• 1996

The demands of minimizing the reactive power and reducing the current harmonics are increasing nowdays. The inverter airconditioner needs high inductive power and it operates with wide load ranges. Conventionally, an huge LC passive filter is used in airconditioner to improve the power factor and to reduce current harmonics which doesn't give good results. In this paper, a design of active power factor correction(APFC)circuit for inverter airconditioner is described. To improve the P.F and reduce the current THD, average current controlled APFC is designed and tested. The problems of APFC implementation, their solution and testing results are described.