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http://dx.doi.org/10.14372/IEMEK.2014.9.5.285

A Variable Latency K'th Order Newton-Raphson's Floating Point Number Divider  

Cho, Gyeong-Yeon (Pukyong National University)
Publication Information
Abstract
The commonly used Newton-Raphson's floating-point number divider algorithm performs two multiplications in one iteration. In this paper, a tentative K'th Newton-Raphson's floating-point number divider algorithm which performs K times multiplications in one iteration is proposed. Since the number of multiplications performed by the proposed algorithm is dependent on the input values, the average number of multiplications per an operation in single precision and double precision divider is derived from many reciprocal tables with varying sizes. In addition, an error correction algorithm, which consists of one multiplication and a decision, to get exact result in divider is proposed. Since the proposed algorithm only performs the multiplications until the error gets smaller than a given value, it can be used to improve the performance of a floating point number divider unit. Also, it can be used to construct optimized approximate reciprocal tables.
Keywords
Error correction; Floating point division; K'th order Newton-Raphson; Variable latency;
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  • Reference
1 D. Harris, S. Oberman, M. Horowitz, "SRT Division Architectures and Implementations," Proceedings of IEEE Symposium on Computer Arithmetic, 1997.
2 V. Lappalainen, T.D. Hamalainen, P. Liuha, "Overview of Research Efforts on Media ISA Extension and their Usage in Video Coding," IEEE Transactions on Circuits and Systems for Video Technology, Vol. 12, No. 8, pp. 660-670, 2002.   DOI   ScienceOn
3 R.B. Lee, "Multimedia extensions for general purpose processor," Proceedings of IEEE Workshop on Signal Processing Systems, pp. 9-23, 1997.
4 S.F. Oberman, M.J. Flynn, "Design Issues in Division and Other Floating Point Operations," IEEE Transactions on Computer, Vol. C-46, No. 2, pp. 154-161, 1997.
5 S.F. McQuillan, J.V. McCanny, R. Hamill, "New Algorithms and VLSI Architectures for SRT Division and Square Root," Proceedings of IEEE Symposium on Computer Arithmetic, pp. 80-86, 1993.
6 C. Shuang, 모든저자기재요망, "Design and Implementation of a 64/32-bit Floating-point Division, Reciprocal, Square root, and Inverse Square root Unit," Proceedings of International Conference on Solid-State and Integrated Circuits Technology, pp. 1976-1979, 2006.
7 M.D. Ercegovac, D.H. Wang, T.J. Zhang, C.H. Hou, "Improving Goldschmidt Division, Square Root, and Square Root Reciprocal," IEEE Transactions on Computer, Vol. 49, No. 7, pp. 759-763, 2000.   DOI   ScienceOn
8 D.L. Fowler, J.E. Smith, "An Accurate, High Speed Implementation of Division by Reciprocal Approximation," Proceedings of IEEE Symposium on Computer Arithmetic, pp. 60-67, 1989.
9 S.F. Anderson, J. Earle, R. Coldschmidt, D. Powers, "The IBM System/360 model 91 Floating Point Execution Unit," IBM Journal of Research and Development, Vol. 11, No. 1, pp. 34-53, 1967.   DOI
10 S. Oberman, "Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessors, " Proceedings of IEEE Symposium on Computer Arithmetic, pp. 106-115, 1999.
11 G. Agrawal, A. Khandelwal, E.E. Swartzlander, "An improved reciprocal approximation algorithm for a Newton Raphson divider," Proceedings of Advanced Signal Processing Algorithms, Architectures and Implementations XVII, 66970M, 2007.
12 S.G. Kim, G.Y. Cho, "A Variable 2Latency Newton-Rapson's Floating Point Number Reciprocal Computation," Korea Information Processing Society, Vol. 12-A, No. 2, pp. 95-102, 2005. (in Korea)
13 P. Markstein, "Computation of elementary functions on the IBM RISC system/6000 processor," IBM Journal of Research and Development, Vol. 34, No. 1, pp. 111-119, 1990.   DOI
14 E.M. Schwarz, "Rounding for Quadratically Converging Algorithm for Division and Square Root," Proceedings of IEEE Asilomar Conference on Signals and Computers, pp. 600-603, 1996.
15 D. DasSarma, D. Matula, "Measuring and Accuracy of ROM Reciprocal Tables," IEEE Transactions on Computer, Vol. 43, No. 8, pp. 932-930, 1994.   DOI   ScienceOn
16 IEEE Standard for Binary Floating-Point Arithmetic, ANSI/IEEE Standard, Std. 754-1985.
17 http://www.itl.nist.gov/fipspubs, Oct. 2008.