• 제어로봇시스템학회:학술대회논문집
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• 1986.10a
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• pp.158-163
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• 1986

This article surveys techniques and issues related to real time process control system developed for industrial control applications. It covers the system architecture and software engineering issues such as the design of data structures, scheduling of asynchronous task activities, management of shared resources, handling of interrupt and implementing an user friendly man-machine interface. Also problems associated with implementing a real-time system that supports dynamic configuration of data base is addressed.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.277-279
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• 1999

본 논문은 FDDI에 기반한 경성 실시간 통신에서 비동기 대역폭을 이용한 오류제어 기법을 제안하고 성능을 평가한다. 제안된 기법은 FDDi 프레임에 포함된 오류 탐지 기능을 기반으로 하고 있으며 오류 제어 과정에 여분의 대역폭을 이용하기 때문에 다른 실시간 메시지 전송에 간섭을 일으키지 않고 전송 오류에 의한 메시지 손실을 감소시켜 종료시한 만족도를 개선한다. 모의 실험 결과는 주어진 메시지 집합에 대해 실시간 메시지의 종료시간 만족도를 최대 29% 개선함과 아울러 비동기 트래픽의 부하에 대해서도 종료시한 만족도가 안정적임을 보인다.

• Journal of the Korea Society for Simulation
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• v.6 no.2
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• pp.117-124
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• 1997

A simulation model for the estimation of cutoff connection rate in the asynchronous transfer mode (ATM) switching system under multimedia traffic environments is presented. The simulator is developed by the integration of the AweSim tool with user-written C++ routines that model the internal structures of operational details of the switching system. For the case study, the simulator is applied to the ATM switching system developed by Electronics and Telecommunications Research Institute (ETRI) to compare design alternatives according to the cutoff connection rates.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.11
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• pp.2056-2063
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• 2011

A time based software simulator for the PRT system operation is presented. The purpose of the simulator is to estimate the passenger transportation performance of the PRT system. In this paper, it is presented how the system is modeled in the simulator to estimate passenger transportation performance and the running algorithm of the modeled subsystem. An application sample is also presented to find the system's design parameter to satisfy the transportation needs.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04d
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• pp.286-288
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• 2003

본 논문에서는 서로 다른 네트워크간의 다양한 프로토콜과 이종의 트래픽을 동시에 처리할 수 있는 네트워크용 SoC (System-on-a-Chip) 프로세서를 구현하였다. 제작된 네트워크 SoC 프로세서는 ARM 프로세서 코어와 ATM(Asynchronous Transfer Mode) 블록, 10/100 Mbps 이더넷 볼록, 스케쥴러, UART 등을 이용하였고 각 블록은 AM8A (Advanced Microcontroller Bus Architecture) 버스로 연결하였다. SoC 프로세서는 CADENCE사의 VerilogHDL을 이용하여 설계하였고 0.35$\mu\textrm{m}$ 셀 라이브러리를 이용하여 검증하였다. 구현된 칩은 총 게이트수가 312,000개이며 칠의 최대 동작 주파수는 50MHz 이다.

• The Transactions of the Korea Information Processing Society
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• v.6 no.11
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• pp.3070-3076
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• 1999

Petri net is one of the effective modeling techniques which analyzes and designs concurrent and asynchronous systems. CPN is an extended Petri net which has color tokens. In this paper, we propose a new test case generation method using CPN. It transforms Estelle Specification into CPN, which is applicable to Design/CPN. It also generates UIO and subtour from OG and descriptor, which are resulted from Design/CPN. Using the proposed method, we can get more improved test coverage than existing methods. Therefore, more effective protocol conformance testing could be conducted. The test case generating method will be the basis of the automatic testing environmented.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.481-482
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• 2007

This paper describes the design of a l0-bit 100 KSample/S CMOS A/D Converter for biomedical applications such as pulse oximetry, body weight scale, ECG etc. We adopted an asynchronous architecture in the 10-b DAC design and hence reduces the number of switches by 11 and resistors by 64 compared with the conventional l0-b DAC. We also reduced the power consumption compare with the conventional architecture by 0.4mW. Output offset cancellation technique is applied to the design of comparator. The total power consumption of designed circuit is 190uW at the supply voltage of 1.8V with the 0.18um general CMOS technology.

• The KIPS Transactions:PartD
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• v.11D no.2
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• pp.435-442
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• 2004

It is important to integrate an enterprise application for automating of the business process, which is responded by a flow of market environment. There are two categories of method that integrate enterprise applications. One is Synchronous Integration, and the other is Asynchronous Integration. EAI(Enterprise Application Integration) and Web service which of the asynchronous integration is focused in the automating method of the business process. After we construct the application integration for automating of the business process, we have to concern about managing of the business transaction. Many Organizations have proposed the process method of business transaction based on 2-phase commit protocol. But this method can't supply the phase that classify the transaction by transaction weight. In this paper, we propose an efficient method of transaction process for business transactions, which is composed by "Classify Phase" that classify transactions. We called this model "3-Phase Commit Method Applied by Classify Phase, " we design this model to manage an resource of enterprise efficiently. The proposed method is compared by the method based on 2-Phase commit that could be a problem of management the resource of enterprise, and the advantage of this method is certified to propose the solution of that problem.ion of that problem.

• Journal of Internet Computing and Services
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• v.10 no.2
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• pp.171-177
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• 2009

Optical packet switching(OPS) is a strong candidate for the next-generation internet, since it has a fine switching granularity at the packet level for providing flexible bandwidth, and provides seamless integration between WDM layer and IP layer. Optical packet switching have been studied in two categories: OPS in synchronous and OPS in asynchronous networks. In this article we are focused on contention resolution of OPS in asynchronous networks. The hybrid buffer have been addressed, to reduce packet loss further as one of the alternative buffer structures for contention resolution of asynchronous and variable length packets, which consists of the FDL buffer and the electronic buffer. The OPS design issue for the limited number of TWCs and internal wavelengths is important in the aspect of switch cost and resource efficiency. Therefore, an hybrid buffer structured optical packet switch and its scheduling algorithm is presented for considering the limited number of TWCs and internal wavelengths, for contention resolution of asynchronous and variable length packets. The proposed algorithm could lead to the packet loss improvement compared to the legacy LAUC-VF algorithm with only the FDL buffer.

• Journal of Korean Institute of Industrial Engineers
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• v.23 no.3
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• pp.559-580
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• 1997

It is essential to construct on efficient material flow system for the successful introduction of automated manufacturing systems. Automated Guided Vehicle System(AGVS) ploys a significant role more and more in modern manufacturing environments, because of the flexibility and the precision they offer. However, as the size and the complexity of systems increase, the problems of dispatching, routing and scheduling of AGVs became complicated due to their independent and asynchronous demands. In this paper, we review relevant papers, and provide a new and more efficient method for partitioning the AGV system by introducing the concept of Central Path. This method named Central Path design has advantages, since each partitioned workstation group is served by one AGV and the material handling between groups is performed by special AGV that is used for the Central Path. Therefore the congestion problems never occur. Furthermore Central Path Design has a high flexibility for alteration and extension of system. Finally, we demonstrate its efficiency using simulation.