• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.1
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• pp.7-15
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• 2004

The ferroelectric SBT thin films as a material of capacitors for non-volatile FRAMs have some problems that its remanent polarization value is relatively low and the crystallization temperature is quite high abovc 80$0^{\circ}C$. Therefore, in this paper, SBTN solution with S $r_{0.9}$B $i_{2.1}$T $a_{1.8}$N $b_{0.2}$$O_{9}$ composition was synthesized by sol-gel method. Sr(O $C_2$ $H_{5}$)$_2$, Bi(TMHD)$_3$, Ta(O $C_2$ $H_{5}$)$_{5}$and Nb(O $C_2$ $H_{5}$)$_{5}$ were used as precursors, which were dissolved in 2-methoxyethanol. SBTN thin films with 200 nm thickness were deposited on Pt/Ti $O_2$/ $SiO_2$/Si substrates by spin-coating. UV-irradiation in a power of 200 W for 10 min and rapid thermal annealing in a 5-Torr-oxygen ambient at 76$0^{\circ}C$ for 60 sec were used to promote crystallization. The films were well crystallized and fine-grained after annealing at $650^{\circ}C$ in oxygen ambient. The electrical characteristics of 2Pr=11.94 $\mu$C/$\textrm{cm}^2$, Ps＋/Pr＋=0.54 at the applied voltage of 5 V were obtained for a 200-nm-thick SBTN films. This results show that 2Pr values of the UV irradiated and rapid thermal annealed SBTN thin films at the applied voltage of 5 V were about 57% higher than those of no additional processed SBTN thin films. thin films.lms.s.s.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.122-122
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• 2008

Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

• Applied Chemistry for Engineering
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• v.17 no.5
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• pp.471-475
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• 2006

$VO_x$ thin films with the thickness of 450 nm were prepared on a $Pt/Ti/SiO_{2}/Si$ substrate at room temperature by a reactive radio frequency (rf) magnetron sputtering method. The deposition rates of $VO_x$ thin films were investigated as a function of $O_{2}$ concentration and rf power. As the $O_{2}$ concentration in a $O_{2}/Ar$ mixture increased, the deposition rate decreased. However, the deposition rate increased with increasing rf power. The deposited $VO_x$ thin films were annealed at $450^{\circ}C$ for 2, 4, and 6 h in $O_{2}$ and $N_{2}$ ambient. After annealing, the phase changes of $VO_x$ thin films were investigated using X-ray diffraction analysis. The plane and cross-sectional views of $VO_x$ thin films before and after annealing were observed by field emission scanning electron microscopy. The metal-insulator transition (MIT) properties of $VO_x$ thin films were measured using current-voltage measurement. The excellent MIT properties were observed in $VO_x$ thin films annealed in $O_{2}$ ambient.

• Proceedings of the KIEE Conference
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• 2001.11a
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• pp.23-25
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• 2001

In this work, the $Ta_2O_5$ thin films were deposited on Pt/n-Si substrate by reactive magnetron sputtering and the RTA treatment at temperatures range from 650 to $750^{\circ}C$ in $O_2$ and vacuum. X-ray diffraction analysis, FE SEM, dielectric properties and leakage current density have been used to study the structural and electrical properties of the $Ta_2O_5$ thin films. XRD result showed that as- deposited films were amorphous and the annealed films crystallized (<$700^{\circ}C$) into ${\beta}-Ta_2O_5$. The crystallinity increased with temperature in terms of an increase in the intensity of the diffracted peaks(${\beta}-Ta_2O_5$) and annealing in oxygen reduced defect dang1ing Ta-O bonds. As deposited $Ta_2O_5$ films show the leakage current density $10^{-7}$ to $10^{-8}$ (A/$cm^2)$ at low electric fields (<200 kV/cm) However, it was found leakage current density of $Ta_2O_5$ thin films decreased with $O_2$ ambient annealing. The dielectric constant of the as deposited $Ta_2O_5$ thin films was ${\varepsilon}_r$ $9{\sim}11$ but the dielectric constant was increased after RTA treatment in $O_2$ ambient more then in vacuum.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.29-33
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• 2003

Material and electrical properties of copper-based ohmic contacts on n-type 4H-SiC were investigated for the effects of the post-annealing and the metal covering conditions. The ohmic contacts were prepared by sequential sputtering of Cu and Si layers on SiC substrate. The post-annealing treatment was performed using RTP (rapid thermal process) in vacuum and reduction ambient. The specific contact resistivity ($p_{c}$), sheet resistance ($R_{s}$), contact resistance ($R_{c}$), transfer length ($L_{T}$), were calculated from resistance (RT) versus contact spacing (d) measurements obtained from TLM (transmission line method) structure. The best result of the specific contact resistivity was obtained for the sample annealed in the reduction ambient as $p_{c}= 1.0 \times 10^{-6}\Omega \textrm{cm}^2$. The material properties of the copper contacts were also examined by using XRD. The results showed that copper silicide was formed on SiC as a result of intermixing Cu and Si layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.157-157
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• 2010

Vertical-structure light-emitting diodes (V-LEDs) by laser lift-off (LLO) have been exploited for high-efficiency GaN-based LEDs of solid-state lightings. In V-LEDs, emitted light from active regions is reflected-up from reflective ohmic contacts on p-GaN. Therefore, silver (Ag) is very suitable for reflective contacts due to its high reflectance (>95%) and surface plasmon coupling to visible light emissions. In addition, low contact resistivity has been obtained from Ag-based ohmic contacts annealed in oxygen ambient. However, annealing in oxygen ambient causes Ag to be oxidized and/or agglomerated, leading to degradation in both electrical and optical properties. Therefore, preventing Ag from oxidation and/or agglomeration is a key aspect for high-performance V-LEDs. In this work, we demonstrate the enhanced thermal stability of Ag-based Ohmic contact to p-GaN by reducing the thermal compressive stress. The thermal compressive stress due to the large difference in CTE between GaN ($5.6{\times}10^{-6}/^{\circ}C$) and Ag ($18.9{\times}10^{-6}/^{\circ}C$) accelerate the diffusion of Ag atoms, leading to Ag agglomeration. Therefore, by increasing the additional residual tensile stress in Ag film, the thermal compressive stress could be reduced, resulting in the enhancement of Ag agglomeration resistance. We employ the thin Ni layer in Ag film to form Ni/Ag mutli-layer structure, because the lattice constant of NiO ($4.176\;{\AA}$ is larger than that of Ag ($4.086\;{\AA}$). High-resolution symmetric and asymmetric X-ray diffraction was used to measure the in-plane strain of Ag films. Due to the expansion of lattice constant by oxidation of Ni into NiO layer, Ag layer in Ni/Ag multi-layer structure was tensilely strained after annealing. Based on experimental results, it could be concluded that the reduction of thermal compressive stress by additional tensile stress in Ag film plays a critical role to enhance the thermal stability of Ag-based Ohmic contact to p-GaN.

• Analytical Science and Technology
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• v.6 no.2
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• pp.217-223
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• 1993

Thin films of the Au/Cr, Au/Ni/Cr and Au/Pd/Cr systems were deposited on alumina substrates at ambient temperature and $250^{\circ}C$ in a high-vacuum resistance heating evaporator and annealed at $300^{\circ}C$, $450^{\circ}C$ and $600^{\circ}C$ for 1 hour in air, respectively. The film thicknesses of Au, Ni(or pd), and Cr were $1000{\AA}$, $300{\AA}$, and $50{\AA}$, respectively. The substrate temperature during deposition and the post-deposition annealing temperature affected the sheet resistance of thin-films due to the inter-diffusion of each layer. As a result of Auger depth profile analysis, in the Au/Cr system Cr already diffused out to Au surface during deposition at the substrate temperature of $250^{\circ}C$ and Au distribution changed after heat treatment. In the Au/Ni/Cr and Au/Pd/Cr systems, diffusion phenomena of Ni and Pd were found and especially Ni (approximately 45 at.%) diffused out to Au surface and oxidized.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.764-768
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• 2002

Characteristics of ohmic Co/Si/Co contacts to n-type 4H-SiC are investigated systematically. The ohmic contacts were formed by annealing Co/Si/Co sputtered sequentially. The annealings were performed at $800^{\circ}C$ using RTP in vacuum ambient and $Ar:H_2$(9:1) ambient, respectively. The specific contact resistivity$(\rho_c)$, sheet resistance$(R_s)$, contact resistance$(R_c)$, transfer length$(L_T)$ were calculated from resistance$(R_T)$ versus contact spacing(d) measurements obtained from TLM(transmission line method) structure. While the resulting measurement values of sample annealed at vacuum ambient were $\rho_c=1.0{\tiimes}10^{-5}{\Omega}cm^2$, $R_c=20{\Omega}$ and $L_T$ = 6.0 those of sample annealed at $Ar:H_2$(9:1) ambient were $\rho_c=4.0{\tiimes}10^{-6}{\Omega}cm^2$, $R_c=4.0{\Omega}$ and $L_T$ = 2.0. The physical properties of contacts were examined using XRD and AES. The results showed that cobalt silicide was formed on SiC and Co was migrated into SiC.

• Korean Journal of Materials Research
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• v.14 no.10
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• pp.688-695
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• 2004

The capacitor contact barrier(CCB) layers have been introduced in the FeRAM integration to prevent the Pt/Al reaction during the back-end processes. Therefore, the interdiffusion and intermetallic formation in $Pt(1500{\AA})/Al(3000{\AA})$ film stacks were investigated over the annealing temperature range of $100\sim500^{\circ}C$. The interdiffusion in Pt/Al interface started at $300^{\circ}C$ and the stack was completlely intermixed after annealing over $400^{\circ}C$ in nitrogen ambient for 1 hour. Both XRD and SBM analyses revealed that the Pt/Al interdiffusion formed a single phase of $RtAl_2$ intermetallic compound. On the other hand, in the presence of TiN($1000{\AA}$) barrier layer at the Pt/Al interface, the intermetallic formation was completely suppressed even after the annealing at $500^{\circ}C$. These were in good agreement with the predicted effect of the TiN diffusion barrier layer. But the conventional TiN CCB layer could not perfectly block the Pt/Al reaction during the back-end processes of the FeRAM integration with the maximum annealing temperature of $420^{\circ}C$. The difference in the TiN barrier properties could be explained by the voids generated on the Pt electrode surface during the integration. The voids were acted as the starting point of the Pt/Al reaction in real FeRAM structure.