• Korean Journal of Crystallography
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• v.3 no.2
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• pp.85-97
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• 1992

EBFZM( Electron Beam Floating Zone Melting) 법을 이용하여 몰리브덴에서의 금속계 불순물과 침입형 불순물의 정련기구 및 단결정 성장기구를 연구하 였다. Fe, Cr, Co등의 금속계 불순물은 몰리브덴과의 평형증기압의 차이에 따른 불순물의 선택적 증발에 의하여 우수한 정련효과를 나타내며, 몰리브덴보다 응점이 높은 Ta, W는 잘 제거되지 않았다. 한편 대역 정제에 의한 정련효과는 미약함을 확인하였다. EBF ZM은 C,0,N등의 침입형 불순물의 정련에도 효과적 이었다. 본 연구의 모든 조건에서 몰리브덴은 단결정으로 성장하였으며 2차 재결정 epitaxy에 의한 단결 정 성장기구가 제시되었다. 몰리브덴 단결정 내의 전 위밀도는 strain-anneal법에 의한 단결정의 경우보다 높았으며,본 실험의 열처리 조건에서는 변화하지 않았다. The purification and single crystal growth mechanisms of molybdenum were analysed in EBFZM ( electron beam floating zone melting). Metallic impurities of Fe, Cr, Co were purified efficiently but Ta and W were not removed well in this study. It was due to a preferential evaporation of the elements caused by the difference in equillibrium vapor pressure between the elements and molybdenum. The pu- rification effect by zone refining was not significant. The EBFZM also refined the interstitial impurities of C, 0 and N, effectively. The single crystals of molybdenum were grown regardless of the experimental conditions and the secondary recrystallization epitaxy was surge sled as a growth mechanism. The dislocation density in single crystal was higher than that by strain-anneal method, and was not reduced by heat treatments.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.485-488
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• 2004

As scaling down the cell channel length, the increment of B concentration in channel region is inevitable to overcome the punch-through, especially in flash memory cell with 90nm technology. This paper shows that the high dose ion implantation in channel cause the Si defect. which has been proved to be the major cause of the tailed Vth in distribution. And also mechanical stress due to SiN-anneal process can induce the Si dislocation. and get worse it. With decreasing the channel implantation dose, skipping the anneal and reducing the mechanical stress, Si defect problem is solved completely. We are verify first that the optimization of B concentration in channel must be certainly considered in order to improve Si defect. It is also certainly necessary to stabilize the distribution of cell Vth in the next generation of flash memory.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04a
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• pp.169-172
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• 2000

A-Si:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly-Si films were achieved by various anneal techniques ; isothermal, RTA, and excimer laser anneal. The TFT on as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from $200^{\circ}C$ to $1000^{\circ}C$. The TFT on poly-Si showed an improved $I_{on}/I_{off}$ ratio of $10^6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly-Si TFTs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.9-12
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• 1998

Film characteristics of thin reoxidized nitrided oxides were investigated by SIMS analysis and C-V method in order to use the gate dielectric for charge-trap type NVSMs instead of ONO stacked layers. Nitric oxide(NO) annealed film has the nitrogen content sharply peaked at the Si-SiO$_2$ interface, while it is broad for nitrous oxide($N_2$O) ambient. The nitrogen peak concentration increased with anneal temperature and time. The position of nitrogen content in the oxide layer was due to be precisely controlled. For the films annealed NO ambient at 80$0^{\circ}C$ for 30min. followed by reoxidized at 85$0^{\circ}C$, the maximum memory window of 3.5V was obtained and the program condition was +12V, 1msec for write and -l3V, 1msec for erase.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.2
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• pp.189-194
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• 2006

Ordered nanostructure materials have received attention due to their unique physical properties and potential applications in electronics, mechanics and optical devices. To actualize most of the proposed applications, it is quite important to obtain highly ordered nanostructure arrays. The well-aligned nanostructure can be achieved by synthesizing nanostructure material in the highly ordered template. To get well-aligned pore array and reduce process time, rapid thermal anneal by an IR lamp was employed in vacuum state at $500^{\circ}C$ for 2 hour. The pore array is comparable to a template annealed in vacuum furnace at $500^{\circ}C$ for 30 hours. The well-fabricated AAO template has the mean pore diameter of 70 nm, the barrier layer thickness of 25 nm, the pore depth of $9{\mu}m$, and the pore density of higher than $1.2{\times}10^{10}cm^{-2}$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.3 s.345
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• pp.9-14
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• 2006

The dependence of NBTI lifetime on the BEOL processes such as sintering gas type and passivation layer has been characterized in depth. Then, optimized BEOL process scheme is proposed to improve NBTI lifetime. NBTI showed degradation due to the plasma enhanced nitride (PE-SiN) passivation film and $H_2$ sintering anneal. Then, new process scheme of $N_2$ annealing instead of $H_2$ annealing prior to PE-SiN deposition is proposed. The proposed BEOL process flow showed that NBTI lifetime can be improved a lot without degradation of device performance and NMOS hot carrier reliability.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.7
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• pp.576-582
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• 2002

Nonvolatile semiconductor memory devices with reoxidized nitrided oxide(RONO) gate dielectrics were fabricated, and nitrogen distribution and bonding species which contribute to memory characteristics were analyzed. Also, memory characteristics of devices depending on the anneal temperatures were investigated. The devices were fabricated by retrograde twin well CMOS processes with $0.35\mu m$ design rule. The processes could be simple by in-situ process in growing dielectric. The nitrogen distribution and bonding states of gate dielectrics were investigated by Dynamic Secondary Ion Mass Spectrometry(D-SIMS), Time-of-Flight Secondary Ion Mass Spectrometry(ToF-SIMS), and X-ray Photoelectron Spectroscopy(XPS). As the nitridation temperature increased, nitrogen concentration increased linearly, and more time was required to form the same reoxidized layer thickness. ToF-SIMS results showed that SiON species were detected at the initial oxide interface which had formed after NO annealing and $Si_2NO$ species within the reoxidized layer formed after reoxidation. As the anneal temperatures increased, the device showed worse retention and degradation properties. It could be said that nitrogen concentration near initial interface is limited to a certain quantity, so the excess nitrogen is redistributed within reoxidized layer and contribute to electron trap generation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.180-184
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• 2002

In this paper, the electrical properties of PVD Ta and $TaN_x$ gate electrodes on $SiO_2$ and their thermal stabilities are investigated. The results show that the work functions of $TaN_x$ gate electrode are modified by the amount of N, which is controlled by the flow rate of $N_2$during reactive sputtering process. The thermal stability of Ta and $TaN_x$ with RTO-grown $SiO_2$ gate dielectrics is examined by changes in equivalent oxide thickness (EOT), flat-band voltage ($V_{FB}$), and leakage current after post-metallization anneal at high temperature in $N_2$ambient. For a Ta gate electrode, the observed decrease in EOT and leakage current is due to the formation of a Ta-incorporated high-K layer during the high temperature annealing. Less change in EOT and leakage current is observed for $TaN_x$ gate electrode. It is also shown that the frequency dispersion and hysteresis of high frequency CV curves are improved significantly by a post-metallization anneal.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.9
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• pp.78-88
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• 1994

The electrical properties of TiM/TiSi$_{2}$ bilayer formed by rapid thermal anneal in NH$_{3}$ ambient after the Ti film is deposited on silicon cubstrate are investigated. N$^{+}$ contact resistance slightly increases with increasing annealing temperature with P$^{+}$ contact resistance decreases. The contact resistance of N$^{+}$ contance was less than 24[.OMEGA.] but P$^{+}$ thatn that of N$^{+}$ contact but the leakage current indicates degradation of the contact at high annealing temperature for both N$^{+}$ and contacts. The leakage current of N$^{+}$ Junction was less than 0.06[fA/${\mu}m^{2}$] but P$^{+}$ contact was 0.11-0.15[fA/${\mu}m^{2}$]. The junction breakdown voltage for N$^{+}$ junction remains contant with increasing annealing temperature while P$^{+}$ junction slightly decreases. The Electrical properties of a two step annealing are better than that of one step annealing. The Tin/TiSi$_{2}$ bilayer formed by RTA in NH$_{3}$ ambient reveals good electrical properties to be applicable at ULSI contact.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.5
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• pp.50-55
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• 1983

A comprehensive study of the electrical properties of low-dose Si implants in Cr-doped GaAs substrates has been made using the Hall-effect/sheet-resistivity measurement technique for various ion doses and annealing temperatures. The samples were implanted at room temperature and annealed with silicon nitride encapsulants in a hydrogen atmosphere for 15 minutes. H-type layers were produced at all dose levels investigated, and the optimum annealing temperature was 850$^{\circ}C$ for all doses. The highest electrical activation efficiency was 89% for Cr-doped GaAs substrates. Depth profiles of carrier concentrations and mo-bilities are highly dependent upon ion dose and annealing temperature. Significant im-plantation damage still remains after an 800$^{\circ}C$ anneal, and a 900$^{\circ}C$ anneal produces signi-ficant outdiffusion as well as indiffusion of the implanted Si ions.