• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 하계학술대회 논문집
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• pp.529-531
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• 1990

Because Filters do both the sampling or Sampled-and-Hold(S/H) operations, it result in the replication of the spectrum of input signal and (unless Nyquist's criterion is satisfied) induce aliasing distortion. In this paper, therefore, we designed AAF(Analog Anti-aliasing Filers) so as to remove high-frequency components from input signal for aliasing distortion prevention before input signal had been processed frequency seletion by filters. and then, researched characteristics of it.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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• pp.93-96
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• 2000

This paper has been proposed an audio DAC structure composed of FIRs and IIR filters as digital interpolation filter to integrate the off-chip analog low-pass filter on-a-chip. The passband ripple(< 0.41${\times}$fs), passband attenuation(at 0.41${\times}$fs) and stopband attenuation(> 0.59${\times}$fs) of the Δ$\Sigma$ modulator output using the proposed digital interpolation filter had ${\pm}$ 0.001 ［㏈］, -0.0025［㏈］ and -75［㏈］, respectively. Also the inband group delay was 30.07/fs［s］ and the error of group delay was 0.1672%. Also, the attenuation of stopband has been increased -20［㏈］ approximately at 65［㎑］, out-of-band. Therefore the RC products of analog low-pass filter on chip have been decreased compared with the conventional digital interpolation filter structure.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.229-232
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• 2005

This paper presents the OTA-based current differencing buffered amplifier (CDBA), which has a simple configuration comprised four OTAs. The proposed circuit is ease of design and suitable for analog signal processing applications in both voltage and current modes. The first order allpass filters were implemented as the application examples in order to demonstrate the performances of the proposed CDBA. PSPICE analog simulation and the commercially available OTAs-based experimental results verifying the circuit performances are also included.

• International Journal of Internet, Broadcasting and Communication
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• 제5권2호
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• pp.11-14
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• 2013

This paper describes the sigma-delta ADC/DAC digital block with two channels. The ADC block has comb filter and three half band filters. And the DAC block has 5th Cascaded-of-Integrators Feedback DSM. The ADC and DAC support I2S, RJ, LJ and selectable input data modes of 24bit, 20bit, and 16bit. It is fabricated with 0.35um Hynix standard CMOS cell library. The chip size is 3700*3700um. It has been verified using NC Verilog Simulator and Matlab Tool.

• 한국군사과학기술학회지
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• 제10권2호
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• pp.84-89
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• 2007

MIL-STD-461E, EMI military standard for the equipment and subsystems, requires reception characteristic tests to verify the susceptibility of a receiver against the jntermodulation and spurious signals. Because the CS103 and CS104 of MIL-STD-461E show the test configuration of the equipment unit like a traditional receiver, it is possible to verify the susceptibility only for the reception signal through analog filters. However, at present when software programming techniques make a progress, the CS103 and CS104 tests need to evaluate the reception signal of the subsystem which includes both the digital filtering effects and analog filter characteristics. These test and evaluation techniques applied to a surveillance radar subsystem. This paper researched the EMI test methods in order to confirm feasibility of these test and evaluation techniques. Also the test results are compared and analyzed.

• 반도체디스플레이기술학회지
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• 제20권1호
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• pp.7-11
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• 2021

The electrocardiogram(ECG) and heart rates are essential for diagnosing heart disease. However, conventional portable ECG devices are possible to only measure heart rates or have limitations in how and where they are measured. In this paper, a portable ECG system in which ECG waveforms and heart rates are displayed on smartphone screens is developed. A smartphone is used as display equipment instead of a computer screen for continuous monitoring. The developed ECG system filters and amplifies detected analog ECG signals. Next, it converts the amplified analog ECG signals into digital signals, then transmits to the smartphone via Bluetooth communication. This ECG system can display and store biomedical signals on a smartphone through the application. As a result, the waveform and heart rates of the developed portable ECG system has been confirmed to be similar to those of existing medical devices.

• Annals of Clinical Neurophysiology
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• 제2권1호
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• pp.8-12
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• 2000

Purpose : The rapid development and wide popularity of Digital EEG(DEEG) is due to its convenience, accuracy and applicability for quantitative analysis. These advantages of DEEG make one hesitate to use analog EEG(AEEG). To assess the advantage of DEEG system utilizing AEEG(DAEEG) over conventional AEEG and the clinical applicability, a DAEEG system was developed and applied to animal model Methods : Sprague-Dawley rat as status epilepticus model were used for collecting the EEG data. After four epidural electrodes were inserted and connected to 8-channel analog EEG(Nihon-Kohden, Japan), continous. EEG monitoring via computer screen was done from two rats simultaneously. EEG signals through analog amplifier and filters were digitized at digital signal processor and stored in Windows-based pentium personal computer. Digital data were sampled at a rate of 200 Hz and 12 bit of resolution. Acquisition software was able to carry out 'real-time view, sensitivity control and event marking' during continuous EEG monitoring. Digital data were stored on hard disk and hacked-up on CD-ROM for off-line review. Review system consisted of off-line review, saving and printing out interesting segment and annotation function. Results: This DAEEG system could utilize most major functions of DEEG sufficiently while making a use of an AEEG. It was easy to monitor continuously compared to Conventional AEEG and to control sensitivity during ictal period. Marking the event such as a clinical seizure or drug injection was less favorable than AEEG due to slowed processing speed of digital processor and central processing unit. Reviewing EEG data was convenient, but paging speed was slow. Storage and management of data was handy and economical. Conclusion : Relatively simple digital EEG system utilizing AEEG can be set-up at n laboratory level. It may be possible to make an application for clinical purposes.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.465-468
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• 1988

A n-well CMOS Operational Transconductance Amplifier -C(OTA-C) integrator with a wide linear input range is designed. The circuit designed has superior linearity of input voltage range compared with the conventional source-coupled pair OTA. The OTA developed in this paper is versatile in application: diverse applications are in the fields of linear amplifiers, continuous-time filters, gain control circuits, and analog multipliers, etc..

• 산업기술연구
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• 제16권
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• pp.191-195
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• 1996

This paper deals with the tapped time delay circuit with SCF(Switched Capacitor Filters). This filter is composed of lossless discrete integrator and the SCF has 2-phase clocks. Experimental results have shown that telephone signals (0~4kHz) could be delayed in the range of sampling frequency 80kHz. But above the range, operational amplifiers and analog switchs have been difficult in the normal operating condition.

• 한국통신학회:학술대회논문집
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• 한국통신학회 1983년도 추계학술발표회논문집
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• pp.56-60
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• 1983

There has been a great amount of interest in the design of digital filters with low sensitivity to coefficient variations. Especiaily the wave digital filter modeled after analog IC ladder filter has been studied to have low-cocfficient-sensitivity properties. This paper examined the design of the wave digital filter and how the sensitivity and roundoff noise porperty arises. As a result of computer simulation the implementation of the digital filter was possible with a lower coefficient word length comparing with the conventional cascade structure.