• Title/Summary/Keyword: amorphous TFTs

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Smart LCD using a-Si photo sensor

  • Hong, Sung-Jin;Kim, Jin-Hong;Shin, Kyung-Ju;Chai, Chong-Chul;Choi, Jung-Ye;Park, Cheol-Woo;Suk, Jun-Hyung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.280-284
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    • 2005
  • Recently, the demands of the high quality LCD display device have increased. We have developed the smart LCD that photo sensor is integrated in. Amorphous silicon TFTs have photo leakage current characteristics when the channel of TFTs are lighted on. This characteristic has applied in our device. We expect that photo sensor integrated LCDs have lots of merits in mobile display device, note PC panel and LCD TV.

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Characteristics of Poly-Si TFTs Fabricated on Flexible Substrates using Sputter Deposited a-Si Films

  • Kim, Y.H.;Moon, D.G.;Kim, W.K.;Han, J.I.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.297-300
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    • 2005
  • The characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated using sputter deposited amorphous silicon (a-Si) precursor films are investigated. The a-Si films were deposited on flexible polymer substrates using argon-helium mixture gases to minimize the argon incorporation into the film. The precursor films were then laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated pMOS TFT showed field-effect mobility of $32.4cm^2/V{\cdot}s$ and on/off ratio of $10^6$.

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Schottky barrier Thin-Film-Transistors crystallized by Excimer laser annealing and solid phase crystallization method (ELA 결정화와 SPC 결정화를 이용한 쇼트키 장벽 다결정 실리콘 박막 트랜지스터)

  • Shin, Jin-Wook;Choi, Chel-Jong;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.129-130
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    • 2008
  • Polycrystalline silicon (poly-Si) Schottky barrier thin film transistors (SB-TFT) are fabricated by erbium silicided source/drain for n-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs have a large on/off current ratio with a low leakage current. Moreover, the electrical characteristics of poly-Si SB TFTs are significantly improved by the additional forming gas annealing in 2 % $H_2/N_2$, because the interface trap states at the poly-Si grain boundaries and at the gate oxide/poly-Si channel decreased.

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The thermal annealing effect on electrical performances of a-Si:H TFT fabricated on a metal foil substrate

  • Han, Chang-Wook;Nam, Woo-Jin;Kim, Chang-Dong;Kim, Ki-Yong;Kang, In-Byeong;Chung, In-Jae;Han, Min-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.745-748
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    • 2007
  • Hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) were fabricated on a flexible metal substrate at $150\;^{\circ}C$. To increase the stability of the flexible a-Si:H TFTs, they were thermally annealed at $230\;^{\circ}C$. The field effect mobility was reduced because of the strain in a- Si:H TFT under thermal annealing.

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디스플레이 및 일시 기능 소자에 적용된 산화물 기반 박막 트랜지스터

  • Nam, Gung-Seok;Song, Min-Gyu;Gwon, Jang-Yeon
    • Ceramist
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    • v.21 no.1
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    • pp.44-54
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    • 2018
  • Oxide semiconductor has been spotlighted as a channel material of TFTs in AMLCD as an alternative to Si, due to high mobility ( > $5cm^2/Vs$). It is also one of the strong candidates for TFTs in AMOLED because of high bias stability at amorphous phase. Beyond the advantages mentioned above, oxide semiconductor has many strengths such as transparency, low fabrication temperature and relatively low fabrication cost. For those reasons, the application of oxide semiconductor is not limited to display but can be extended to new types of electronics, for example, transient electronics for human implantable devices. From this context, oxide materials that have been used as semiconductor and insulator at transient electronics are investigated respectively, and conductor and substrate candidates are also explained, since transient electronics require systematic consideration beyond individual oxide films.

Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors (두 단계 열처리에 의해 제작된 다결정 실리콘 박막트랜지스터의 전기적 특성의 분석)

  • 최권영;한민구;김용상
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.4
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    • pp.568-573
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    • 1996
  • The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

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Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

  • Kim, Yu-Mi;Jeong, Kwang-Seok;Yun, Ho-Jin;Yang, Seung-Dong;Lee, Sang-Youl;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
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    • v.13 no.1
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    • pp.47-49
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    • 2012
  • In this paper, we investigated the anomalous hump in the bottom gate staggered a-IGZO TFTs. During the positive bias stress, a positive threshold voltage shift was observed in the transfer curve and an anomalous hump occurred as the stress time increased. The hump became more serious in higher gate bias stress while it was not observed under the negative bias stress. The analysis of constant gate bias stress indicated that the anomalous hump was influenced by the migration of positively charged mobile interstitial zinc ion towards the top side of the a-IGZO channel layer.

Thermally Induced Metastability in Boron-Doped Amorphous Silicon Thin Film Transistor (보론 도우핑된 비정질 실리콘 박막 트랜지스터의 열에 의한 준안정성 연구)

  • Lee, Yi-Sang;Chu, Hye-Yong;Jang, Jin
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.3
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    • pp.130-136
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    • 1989
  • Electrical transport and thermally induced metastability in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) using boron-doped amorphous silicon as an active layer have been studied. The device characteristics n-channel and p-channel operations. The thermal quenching experiments on amorphous silicon-silicon nitride ambipolar TFT give clear evidence for the co-existence of two distinct metastable changes. The densities of metastable active dopants and dangling bonds increase with the quenching temperature. On the other hand, the interface state density appears to decrease with increasing quenching temperature.

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Evaluation of Flexible Complementary Inverters Based on Pentacene and IGZO Thin Film Transistors

  • Kim, D.I.;Hwang, B.U.;Jeon, H.S.;Bae, B.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.154-154
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    • 2012
  • Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

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Layer-by-layer nitrogenation of microcrystalline silicon for TFT applications

  • Bu, I.;Milne, W.I.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.405-407
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    • 2004
  • We have optimized the low temperature growth of microcrystalline silicon at 80$^{\circ}C$. This material has been used to fabricate bottom gate ${\mu}c$-Si:H TFTs by using a layer-by-layer nitrogenation process. By using this process the amorphous incubation layer can be converted into silicon nitride and leads to an increase in field effect mobility of the TFT

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