• Title/Summary/Keyword: algorithm for multiplication

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An Efficient Algorithm for Simultaneous Elliptic Curve Scalar Multiplication

  • Kim, Ki-Hyung;Ha, Jae-Cheol;Moon, Sang-Jae
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 2003.12a
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    • pp.412-416
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    • 2003
  • This paper introduces a new joint signed expansion method for computing simultaneous scalar multiplication on an elliptic curve and a modified binary algorithm for efficient use of the new expansion method. The proposed expansion method can be also be used in cryptosystems such as RSA and EIGamal cryptosystems.

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Efficient Modular Multiplication for 224-bit Prime Field (224비트 소수체에서 효율적인 모듈러 곱셈)

  • Chang, Nam Su
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.3
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    • pp.515-518
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    • 2019
  • The performance of Elliptic Curves Cryptosystem(ECC) is dominated by the modular multiplication since the elliptic curve scalar multiplication consists of the modular multiplication in projective coordinates. In this paper, we propose a new method that combines the Karatsuba-Ofman multiplication method and a new modular reduction algorithm in order to improve the performance of the modular multiplication for NIST p224 in the FIPS 186-4 standard. The proposed method leads to a running time improvement for computing the modular multiplication about 25% faster than the previous methods. The results also show that the method can reduce the arithmetic complexity by half when compared with traditional implementations on the standpoint of the modular reduction.

Bit-Level Systolic Array for Modular Multiplication (모듈러 곱셈연산을 위한 비트레벨 시스토릭 어레이)

  • 최성욱
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 1995.11a
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    • pp.163-172
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    • 1995
  • In this paper, the bit-level 1-dimensionl systolic array for modular multiplication are designed. First of all, the parallel algorithms and data dependence graphs from Walter's Iwamura's methods based on Montgomery Algorithm for modular multiplication are derived and compared. Since Walter's method has the smaller computational index points in data dependence graph than Iwamura's, it is selected as the base algorithm. By the systematic procedure for systolic array design, four 1-dimensional systolic arrays ale obtained and then are evaluated by various criteria. Modifying the array derived from 〔0,1〕 projection direction by adding a control logic and serializing the communication paths of data A, optimal 1-dimensional systolic array is designed. It has constant I/O channels for modular expandable and is good for fault tolerance due to unidirectional paths. And so, it is suitable for RSA Cryptosystem which deals with the large size and many consecutive message blocks.

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Bit-level 1-dimensional systolic modular multiplication (비트 레벨 일차원 시스톨릭 모듈러 승산)

  • 최성욱;우종호
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.9
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    • pp.62-69
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    • 1996
  • In this paper, the bit-level 1-dimensional systolic array for modular multiplication is designed. First of all, the parallel algorithm and data dependence graph from walter's method based on montgomery algorithm suitable for array design for modular multiplication is derived. By the systematic procedure for systolic array design, four 1-dimensional systolic arrays are obtained and then are evaluated by various criteria. As it is modified the array which is derived form [0,1] projection direction by adding a control logic and it is serialized the communication paths of data A, optimal 1-dimensional systolic array is designed. It has constant I/O channels for expansile module and it is easy for fault tolerance due to unidirectional paths. It is suitable for RSA cryptosystem which deals iwth the large size and many consecutive message blocks.

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Comparison of High Speed Modular Multiplication and Design of Expansible Systolic Array (고속 모듈러 승산의 비교와 확장 가능한 시스톨릭 어레이의 설계)

  • Chu, Bong-Jo;Choe, Seong-Uk
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.5
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    • pp.1219-1224
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    • 1999
  • This paper derived Montgomery's parallel algorithms for modular multiplication based on Walter's and Iwamura's method, and compared data dependence graph of each parallel algorithm. Comparing the result, Walter's parallel algorithm has small computational index in data dependence graph, so it is selected and used to computed spatial and temporal pipelining diagrams with each projection direction for designing expansible bit-level systolic array. We also evaluated internal operation of proposed expansible systolic array C++ language.

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The Montgomery Multiplier Using Scalable Carry Save Adder (분할형 CSA를 이용한 Montgomery 곱셈기)

  • 하재철;문상재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.10 no.3
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    • pp.77-83
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    • 2000
  • This paper presents a new modular multiplier for Montgomery multiplication using iterative small carry save adder. The proposed multiplier is more flexible and suitable for long bit multiplication due to its scalable property according to design area and required computing time. We describe the word-based Montgomery algorithm and design architecture of the multiplier. Our analysis and simulation show that the proposed multiplier provides area/time tradeoffs in limited design area such as IC cards.

A low-cost compensated approximate multiplier for Bfloat16 data processing on convolutional neural network inference

  • Kim, HyunJin
    • ETRI Journal
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    • v.43 no.4
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    • pp.684-693
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    • 2021
  • This paper presents a low-cost two-stage approximate multiplier for bfloat16 (brain floating-point) data processing. For cost-efficient approximate multiplication, the first stage implements Mitchell's algorithm that performs the approximate multiplication using only two adders. The second stage adopts the exact multiplication to compensate for the error from the first stage by multiplying error terms and adding its truncated result to the final output. In our design, the low-cost multiplications in both stages can reduce hardware costs significantly and provide low relative errors by compensating for the error from the first stage. We apply our approximate multiplier to the convolutional neural network (CNN) inferences, which shows small accuracy drops with well-known pre-trained models for the ImageNet database. Therefore, our design allows low-cost CNN inference systems with high test accuracy.

A Study on the Multiplication of Boolean Matrices (불리언 행렬의 곱셈에 관한 연구)

  • Han Jae-Il;Jun Sung-Taeg
    • Proceedings of the Korea Contents Association Conference
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    • 2005.11a
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    • pp.389-392
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    • 2005
  • Boolean matrices are applied to a variety of areas and used successfully in many applications. There are many researches on the application and multiplication of boolean matrices. Most researches deal with the multiplication of boolean matrices, but all of them focus on the multiplication of just two boolean matrices and very few researches deal with the multiplication of many pairs of two boolean matrices. The paper discusses it is not suitable to use for the multiplication of many pairs of two boolean matrices the algorithm for the multiplication of two boolean matrices that is considered optimal up to now, and suggests a method that can improve the multiplication of a $n{\times}m$ boolean matrix and all $m{\times}k$ boolean matrices.

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Implementation of Modular Multiplication and Communication Adaptor for Public Key Crytosystem (공개키 암호체계를 위한 Modular 곱셈개선과 통신회로 구현에 관한 연구)

  • 한선경;이선복;유영갑
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.7
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    • pp.651-662
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    • 1991
  • An improved modular multiplication algorithm for RSA type public key cryptosystem and its application to a serial communication cricuit are presented. Correction on a published fast modular multiplication algorithm is proposed and verified thru simulation. Cryptosystem for RS 232C communication protocol isdesigned and prototyped for low speed data exchange between computers. The system adops the correct algoroithm and operates successfully using a small size key.

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Efficient Architecture of an n-bit Radix-4 Modular Multiplier in Systolic Array Structure (시스톨릭 어레이 구조를 갖는 효율적인 n-비트 Radix-4 모듈러 곱셈기 구조)

  • Park, Tae-geun;Cho, Kwang-won
    • The KIPS Transactions:PartA
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    • v.10A no.4
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    • pp.279-284
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    • 2003
  • In this paper, we propose an efficient architecture for radix-4 modular multiplication in systolic array structure based on the Montgomery's algorithm. We propose a radix-4 modular multiplication algorithm to reduce the number of iterations, so that it takes (3/2)n+2 clock cycles to complete an n-bit modular multiplication. Since we can interleave two consecutive modular multiplications for 100% hardware utilization and can start the next multiplication at the earliest possible moment, it takes about only n/2 clock cycles to complete one modular multiplication in the average. The proposed architecture is quite regular and scalable due to the systolic array structure so that it fits in a VLSI implementation. Compared to conventional approaches, the proposed architecture shows shorter period to complete a modular multiplication while requiring relatively less hardware resources.