• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.84-87
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• 2006

본 연구는 Current Mirror에 있어서 Active Current Bias에 관하여 기술하였다. Current mirror에서 Active Current Bias를 걸어주는 보편적인 방법은 Current Bias단에 저항을 연결하여 저항값을 조절함으로 해서 Current를 제어하는 방법을 사용한다. Reference 전류를 제어하는데 있어 새로이 제안하는 것은 Flyback Converter를 이용하여 Acitve Current Bias를 제어 하려 한다. 트랜지스터를 이용하여 Current Mirror Circuit를 구성하고 Current Bias 측에 Flyback Converter Circuit을 연결한다. Flyback Converter의 PWM의 Duty Ratio를 조절함으로 해서 전류를 제어하는 특징을 이용하여 Active Current Bias를 제어한다.

• Journal of information and communication convergence engineering
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• v.15 no.2
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• pp.112-116
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• 2017

In this work, we demonstrated a low noise and high linearity low noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) with novel active bias circuit for LTE applications. The device technology used in this work relies on a process involving a $0.25-{\mu}m$ GaAs pseudomorphic high electron mobility transistor (PHEMT). The LNA MMIC with a novel active bias circuit has a small signal gain of $19.7{\pm}1.5dB$ and output third order intercept point (OIP3) of 38-39 dBm in the frequency range 1.75-2.65 GHz. The noise figure (NF) is less than 0.58 dB over the full bandwidth. Compared with the characteristics of the LNA MMIC without using the novel active bias circuit, the OIP3 is improved about 2-3 dBm. The small signal gain and NF showed no significant change after using the active bias circuit. The novel active bias circuit indeed improves the linearity performance of the LNA MMIC without degradation.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.215.2-215.2
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• 2015

We fabricated dual active layer (DAL) thin film transistors (TFTs) with indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film layers using solution process. The ITZO and IGZO layer were used as the front and back channel, respectively. In order to investigate the bias stress stability of ITZO SAL (single active layer) and ITZO/IGZO DAL TFT, a gate bias stress of 10 V was applied for 1500 s under the dark condition. The SAL TFT composed of ITZO layer shows a poor positive bias stability of ${\delta}VTH$ of 13.7 V, whereas ${\delta}VTH$ of ITZO/IGZO DAL TFT was very small as 2.6 V. In order to find out the evidence of improved bias stress stability, we calculated the total trap density NT near the channel/gate insulator interface. The calculated NT of DAL and SAL TFT were $4.59{\times}10^{11}$ and $2.03{\times}10^{11}cm^{-2}$, respectively. The reason for improved bias stress stability is due to the reduction of defect sites such as pin-hole and pores in the active layer.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1650-1660
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• 2016

This paper proposes a compensator to eliminate the DC bias of inductor current. This method utilizes an average-current sensing technique to detect the DC bias of inductor current. A small signal model of the DC bias compensation loop is derived. It is shown that the DC bias has a one-pole relationship with the duty cycle of the left side leading lag. By considering the pole produced by the dual active bridge (DAB) converter and the pole produced by the average-current sensing module, a one-pole-one-zero digital compensation method is given. By using this method, the DC bias is eliminated, and the stability of the compensation loop is ensured. The performance of the proposed compensator is verified with a 1.2-kW DAB converter prototype.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.252-253
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• 2011

ZnO-based thin film transistors (TFTs) are of great interest for application in next generation flat panel displays. Most research has been based on amorphous indium-gallium-zinc-oxide (IGZO) TFTs, rather than single binary oxides, such as ZnO, due to the reproducibility, uniformity, and surface smoothness of the IGZO active channel layer. However, recently, intrinsic ZnO-TFTs have been investigated, and TFT- arrayss have been demonstrated as prototypes of flat-panel displays and electronic circuits. However, ZnO thin films have some significant problems for application as an active channel layer of TFTs; it was easy to change the electrical properties of the i-ZnO thin films under external conditions. The variable electrical properties lead to unstable TFTs device characteristics under bias stress and/or temperature. In order to obtain higher performance and more stable ZnO-based TFTs, HZO thin film was used as an active channel layer. It was expected that HZO-TFTs would have more stable electrical characteristics under gate bias stress conditions because the binding energy of Hf-O is greater than that of Zn-O. For deposition of HZO thin films, Hf would be substituted with Zn, and then Hf could be suppressed to generate oxygen vacancies. In this study, the fabrication of the oxide-based TFTs with HZO active channel layer was reported with excellent stability. Application of HZO thin films as an active channel layer improved the TFT device performance and bias stability, as compared to i-ZnO TFTs. The excellent negative bias temperature stress (NBTS) stability of the device was analyzed using the HZO and i-ZnO TFTs transfer curves acquired at a high temperature (473 K).

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.763-766
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• 2003

A direct parameter extraction method using several two-port parameter equations derived in cutoff and active bias modes has been studied to obtain an accurate Gummel-Poon BJT model. First, dc model parameters were extracted from slopes and y-axis intercepts of I-V curve and Gummel plot. The pad capacitances and junction capacitance parameters were determined by using measured S-parameter sets in the cutoff bias. The resistance and transit time parameters were extracted by using measured S-parameter sets in the active bias.

• The Journal of Information Systems
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• v.27 no.3
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• pp.81-102
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• 2018

Purpose The purpose of this study is to investigate the reason why smartphone users do not use mobile banking based on Status Quo Bias and to find out whether there is a difference between passive resistance and active resistance. Design/methodology/approach This study made a design of the research model based on Status Quo Bias. SPSS 23.0 and SmartPLS 2.0 were used for the analysis. Multiple group analysis was performed to identify differences between groups. Findings According to the empirical analysis result, this study confirmed that inertia and perceived risk affected smartphone users who do not use mobile banking. According to the type of resistance, the active resistance group(64.2%) was more than the passive resistance group(35.8%), and it was confirmed that there was a difference in the reasons for not using mobile banking between passive and active resistance group. That is, the greatest difference between passive and active resistance groups was found to be perceived risk, which is an assessment of risk.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.261-264
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• 2005

This paper presents the design of a down-conversion mixer with built-in active balun integrated in a $0.25\;{\mu}m$ pHEMT process. The active balun consists of series-connected common-gate FET and common-source FET. The designed balun achieved broadband characteristics by optimizing gate-width and bias condition for the reduction in parasitic effect. From DC to more than 6GHz, the active balun shows the phase error of less than 3 degree and the gain error of less than 0.4 dB. A single-balanced down-conversion mixer with built-in broadband active balun has been designed with optimum width, load resistor and bias for conversion gain and without any matching component for broadband operating. The designed mixer whose size of including on-chip bias circuit is $1\;mm{\times}1\;mm$ shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz and $P_{1dB}$ of -10 dBm at 5.8 GHz

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.353-356
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• 2000

Multi-bias parameter extraction technique for HEMT small signa] equivalent circuits is presented in this paper. The technique in this paper uses S-parameters measured at various bias points in the active region to construct one optimization problem, of which the vector of unknowns contains only a set of bias-independent elements. Tests are peformed on measured S-parameters of a pHEMT at 30 bias points. Results indicate that the calculated S-parameters is similar to the measured data.