• Journal of Electrical Engineering and information Science
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• v.1 no.1
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• pp.160-163
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• 1996

New formulas for McClellan transform parameters for the design of 2-D zero-phase FIR fan filters are optimally derived under the integral squared error(ISE) criterion. By imposing the constraint that F(0, 0)=\ulcorner, where F($.$) is the McClellan transform and $\omega$\ulcorner is the cutoff frequency of the 1-D prototype filter, the ISE is directly minimized without modifying it and, as a consequence, closed-form formulas for the McClellan transform parameters are obtained. It is shown that these formulas lead to a very efficient design for 2-D zero-phase FIR fan filters.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.787-790
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• 2004

In this paper, a novel control scheme compensating for source voltage unbalance and current harmonics and power factor correction in unified active power filter systems combined with shunt passive filters is proposed, where no low/high-pass filter are used in deriving the reference voltage for compensation. Using digital all-pass filters, the phase angle and the reference voltages compensating for harmonic current and unbalanced voltage are derived from the positive sequence component of the unbalanced voltage. The amplitude of d-axis current in a series filter is controlled as zero for power factor correction. The validity of the proposed control scheme has been verified by experimental results.

• Proceedings of the KIEE Conference
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• 2004.04a
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• pp.103-105
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• 2004

In this paper, a novel control scheme compensating for source voltage unbalance and current harmonics and power factor simultaneously in unified active power filter systems combined with shunt passive filters is proposed, where no low/high-pass filter are used in deriving the reference voltage for compensation. Using digital all-pass filters, the phase angle and the reference voltages compensating for harmonic current and unbalanced voltage are derived from the positive sequence component of the unbalanced voltage. The amplitude of d-axis current in a series filter is controlled as zero for power factor correction. The validity of the proposed control scheme has been verified by experimental results.

• Journal of Power Electronics
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• v.12 no.4
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• pp.654-663
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• 2012

In this paper, a digital control strategy based on equivalent fundamental and odd harmonic resonators is proposed for single-phase DVRs. By using a delay block, which can be equivalent to a bank of resonators, it rejects the fundamental and odd harmonic disturbances effectively. The structure of the single closed-loop control system consists of a delay block, a proportional gain and a set of zero phase notch filters. The principle of the controller design is discussed in detail to ensure the stability of the system. Both the supply voltage and the load current feedforwards are used to improve the response speed and the ability to eliminate disturbances. The proposed controller is simple in terms of its structure and implementation. It has good performances in harmonic compensation and dynamic response. Experimental results from a 2kW DVR prototype confirm the validity of the design procedure and the effectiveness of the control strategy.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.5
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• pp.409-415
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• 2012

This paper presents a new software-based on-line dead-time compensation technique for a single-phase grid-connected photovoltaic (PV) inverter system. To prevent a short circuit in the inverter arms, a switching delay time must be inserted in the pulse width modulation (PWM) signals. This causes the dead-time effect, which degrades the system performance around zero-crossing point of the output current. To reduce the dead-time effect around the zero-crossing point of grid current, a harmonic mitigation of grid current is used as an additional part of the synchronous frame current control scheme. This additional task mitigates the harmonic components caused by the dead-time from the grid current. Simulation and experimental results are shown to verify the effectiveness of the proposed dead-time compensation method in the single-phase grid-connected inverter system.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.150-152
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• 2018

계통 사고 시 계통연계형 인버터에 대한 각국의 계통 규정(Grid Code)이 더욱 엄격해 지고 있다. 계통 규정은 특히, 계통 내 저전압 사고로 인한 인버터 운전계속성(Low Voltage Ride Through, LVRT)뿐만 아니라 0 전압 사고 시 운전계속성(Zero Voltage Ride Through, ZVRT)을 통해 인버터가 계통 안정화에 기여할 것을 요구하고 있다. 계통연계형 인버터는 계통전압과 인버터 출력 위상을 일치시키는 PLL제어가 적용되며 본 논문에서는 위상 추종이 어려운 0 전압 상황에서도 안정적인 위상 추종 및 인버터 출력이 가능한 PLL 방법을 제안한다. 단상 인버터에 Notch filter-PLL, APF를 이용한 dq-PLL, 및 SOGI-PLL(Second-order Generalized Intergrator)을 적용하고 독일, 미국, 및 일본의 0 전압 상황에 대해 시뮬레이션과 실험을 진행하여 제안한 PLL 기법의 ZVRT 유효성을 확인하였다.

• Proceedings of the KIPE Conference
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• 2008.10a
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• pp.124-126
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• 2008

Grid Connected inverter is produced current to deliver power to grid. To provide low THD current, LCL filters is effective to filter high frequency component of current output from inverter. To provide sinusoidal waveform, there are many researchers have been proposed several controllers for grid-connected inverter controllers. Synchronous Reference Frame (SRF)-based controller is the most popular methods. SRF-based controller is capable for reducing both of zero-steady state error and phase delay. But SRF based controller is contained cross-coupling components, which generate some difficulties to analyze. In this paper, SRF based controller is analyzed. By applying decoupling control, cross-coupling component is eliminated and single phase model of the system is obtained. Through this single phase model, gain controller is designed. To reduce steady state error, proportional gain is set as high as possible, but it may produce instability. To compromise between a minimum steady state error and stability, the single phase model is evaluate through Root Locus and Bode diagram. PSIM simulation is used to verify the analysis.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2129-2138
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• 2016

The full-bridge inverter, widely used for single-phase photovoltaic grid-connected applications, presents a leakage current issue. Therefore, an AC bypass branch is introduced to overcome this challenge. Nevertheless, existing modulation strategies entail drawbacks that should be addressed. One is the zero-crossing distortion (ZCD) of the AC current caused by neglecting the AC filter inductor voltage. Another is that the system cannot deliver reactive power because the AC bypass branch switches at the power frequency. To address these problems, this work proposes an optimized hybrid modulation strategy. To reduce ZCD, the phase angle of the inverter output voltage reference is shifted, thereby compensating for the neglected leading angle. To generate the reactive power, the interval of the negative power output is calculated using the power factor. In addition, the freewheeling switch is kept on when power is flowing into the grid and commutates at a high frequency when power is fed back to the DC side. In this manner, the dead-time insertion in the high-frequency switching area is minimized. Finally, the performances of the proposed modulation strategy and traditional strategies are compared on a universal prototype inverter. Experimental results validate the theoretical analysis.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.2
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• pp.49-55
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• 2003

This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft switching commutation. In the first place, the steady state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment of set-up in laboratory system of this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.217-221
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• 2001

This paper presents a new prototype of soft-switching DC-DC power converter with a high frequency transformer link which has two active power controlled switches in full bridge rectifier with capacitor input type smoothing filter. In this DC-DC converter, ZVS of the inverter in transformer primary side and ZCS of active rectifier area in secondary side can be completely achieved by taking advantage of parasitic inductor component of high-frequency transformer and loss less snubbing capacitors. Its operation principle and salient features are described. The steady-state operating characteristics of the proposed DC-DC power converter are illustrated and discussed on the basis of the simulation results in addition to the experimental ones obtained by 2kw-40kHz power converter breadboard set up.