• 제목/요약/키워드: Y-junction Structure

검색결과 438건 처리시간 0.033초

Design of 100-V Super-Junction Trench Power MOSFET with Low On-Resistance

  • Lho, Young-Hwan;Yang, Yil-Suk
    • ETRI Journal
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    • 제34권1호
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    • pp.134-137
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    • 2012
  • Power metal-oxide semiconductor field-effect transistor (MOSFET) devices are widely used in power electronics applications, such as brushless direct current motors and power modules. For a conventional power MOSFET device such as trench double-diffused MOSFET (TDMOS), there is a tradeoff relationship between specific on-state resistance and breakdown voltage. To overcome the tradeoff relationship, a super-junction (SJ) trench MOSFET (TMOSFET) structure is studied and designed in this letter. The processing conditions are proposed, and studies on the unit cell are performed for optimal design. The structure modeling and the characteristic analyses for doping density, potential distribution, electric field, width, and depth of trench in an SJ TMOSFET are performed and simulated by using of the SILVACO TCAD 2D device simulator, Atlas. As a result, the specific on-state resistance of 1.2 $m{\Omega}-cm^2$ at the class of 100 V and 100 A is successfully optimized in the SJ TMOSFET, which has the better performance than TDMOS in design parameters.

Design of Super-junction TMOSFET with Embedded Temperature Sensor

  • Lho, Young Hwan
    • 전기전자학회논문지
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    • 제19권2호
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    • pp.232-236
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    • 2015
  • Super-junction trench MOSFET (SJ TMOSFET) devices are well known for lower specific on-resistance and high breakdown voltage (BV). For a conventional power MOSFET (metal-oxide semiconductor field-effect transistor) such as trench double-diffused MOSFET (TDMOSFET), there is a tradeoff relationship between specific on-state resistance and breakdown voltage. In order to overcome the tradeoff relationship, a SJ TMOSFET structure is suggested, but sensing the temperature distribution of TMOSFET is very important in the application since heat is generated in the junction area affecting TMOSFET. In this paper, analyzing the temperature characteristics for different number bonding for SJ TMOSFET with an embedded temperature sensor is carried out after designing the diode temperature sensor at the surface of SJ TMOSFET for the class of 100 V and 100 A for a BLDC motor.

$SnO_2$-$Sb_xS_{1-x}$-Sn 구조에서의 광기전력 효과 (Photovoltaic Effects of $SnO_2$-$Sb_xS_{1-x}$-Sn Structure)

  • 박태영;김화택
    • 대한전자공학회논문지
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    • 제16권4호
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    • pp.32-35
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    • 1979
  • SnO2- amorphous Sb 5 thin film-Sn structure에서 SnO2 창으로 photon을 입사시켰을 때 photo-voltaic 효과를 발견했으며 photon의 energy에 따라 photowltage의 부호가 반전 되었다. 이러한 현상은 SnO2- Sb S 사이에서 n-n heterojunction이, Sb S Sn사이에서 schottky junction이 형성되기 때문인 것으로 여겨진다.

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4.5 kV급 Super Junction IGBT의 Pillar 간격에 따른 전기적 특성 분석 (Analysis of Electrical Characteristics According to the Pillar Spacing of 4.5 kV Super Junction IGBT)

  • 이건희;안병섭;강이구
    • 한국전기전자재료학회논문지
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    • 제33권3호
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    • pp.173-176
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    • 2020
  • This study focuses on a pillar in which is implanted a P-type maneuver under a P base. This structure is called a super junction structure. By inserting the pillar, the electric field concentrated on the P base is shared by the pillar, so the columns can be dispersed while maintaining a high breakdown voltage. Ten pillars were generated during the multi epitaxial process. The interval between pillars is varied to optimize the electric field to be concentrated on the pillar at a threshold voltage of 6 V, a yield voltage of 4,500 V, and an on-state voltage drop of 3.8 V. The density of the filler gradually decreased when the interval was extended by implanting a filler with the same density. The results confirmed that the size of the depletion layer between the filler and the N-epitaxy layer was reduced, and the current flowing along the N-epitaxy layer was increased. As the interval between the fillers decreased, the cost of the epitaxial process also decreased. However, it is possible to confirm the trade-off relationship that deteriorated the electrical characteristics and efficiency.

금속 구조 변화에 따른 선택 화학기상증착 W Plug의 접합 신뢰성 연구 (The Effects of Metal Structure on the Junction Stability of Sub-micron Contacts Using Selective CVD-W Plug)

  • 최경근;김춘환;박흥락;고철기
    • 전자공학회논문지A
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    • 제31A권5호
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    • pp.94-100
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    • 1994
  • The junction failure mechanism of W plugs has not been fully understood while the selective W deposition has been widely used for plugging interconnection lines. In this paper, the thermal stability and junction failure mechanism of sub-micron contacts using selective CVD-W plugs were intensively studied with the metal lines of AISiCu, Ti/AISiCu and TiN/AISiCu. The experimental results showed that the contact chain resistance and leakage current in the AISiCu and Ti/AISiCu metallizations were significantly degraded after annealing. From the SEM analysis, it was found that the junction spiking, due to the Al atoms diffusion along the porous interface between selective CVD-W and contactside wall, caused the junction failure. In constast, there was no degradation of the contact resistance and junction leakage current in TiN/AISiCu metal structu-re. It is believed that the TiN barrier layer could prevent AI(Ti) atoms Fromdiffusing. Therefore, TiN barrier between W plug and Al should be used to impro-ve the thermal stability of sub-micron contacts using the selective CVD-W plugs.

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Bi-directional Two Terminal Switching Device based on SiGe for Spin Transfer Torque (STT) MRAM

  • Yang, Hyung-Jun;Kil, Gyu-Hyun;Lee, Sung-Hyun;Song, Yun-Heub
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.385-385
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    • 2012
  • A two terminal N+/P/N+ junction device to replace the conventional selective transistor was studied as a bilateral switching device for spin transfer torque (STT) MRAM based on 3D device simulation. An N+/P/N+ junction structure with $30{\times}30nm$ area requires bi-directional current flow enough to write a data by a drain induced barrier lowering (DIBL) under a reverse bias at N+/P (or P/N+ junction), and high current on/off ratio of 106. The SiGe materials are widely used in hetero-junction bipolar transistors, bipolar compensation metal-oxide semiconductors (BiCMOS) since the band gap of SiGe materials can be controlled by changing the fraction and the strain epilayers, and the drift mobility is increased with the increasing Ge content. In this work, N+/P/N+ SiGe material based junction provides that drive current is increased from 40 to $130{\mu}A$ by increased Ge content from 10~80%. When Ge content is about 20%, the drive current density of SiGe device substantially increased to 2~3 times better than Si-based junction device in case of 28 nm P length, which is sufficient current to operation of STT-MRAM.

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Large Tunneling Magnetoresistance of a Ramp-type Junction with a SrTiO3 Tunneling Barrier

  • Lee, Sang-Suk;Yoon, Moon-Sung;Hwang, Do-Guwn;Rhie, Kung-Won
    • Journal of Magnetics
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    • 제8권2호
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    • pp.89-92
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    • 2003
  • The tunneling magnetoresistance (TMR) of a ramp-edge type junction with SrTiO$_3$barrier layer has been stud-ied. The samples with a structure of glass/NiO(600${\AA}$)/Co(100${\AA}$)/SrTiO$_3$(400 ${\AA}$)/SrTiO$_3$(20-100${\AA}$)/NiFe(100${\AA}$) were prepared by the sputtering and etched by the electron cyclotron (ECR) argon ion milling. Nonlinear I-V characteristics were obtained from a ramp-type tunneling junctions, having the dominant difference between two different external magnetic fields (${\pm}$100 Oe) perpendicular to the junction edge line. In the SrTiO$_3$ barrier thickness of 40${\AA}$, the TMR was 52.7% at a bias voltage of -50 mV The bias voltage dependence of resistance and TMR in a ramp-type tunneling junction was similar with those of the layered TMR junction.

공정조건에 따른 함몰된 다결정실리콘/실리콘($n^{+}$) - 실리콘(p) 접합의 특성 (Properties of Recessed Polysilicon/Silicon($n^{+}$) - Silicon(P) Junction with Process Condition)

  • 이종호;최우성;박춘배;이종덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1994년도 춘계학술대회 논문집
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    • pp.152-153
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    • 1994
  • A recessed $n^{+}$-p junction diode with the serf-aligned structure is proposed and fabricated by using the polysilicon as an $n^{+}$ diffusion source. The diode structure can be applicable to the emitter-base formation of high performance bipolar device and the $n^{+}$ polysilicon emitter has an important effect on the device characteristics. The considered parameters for the polysilicon formation are the deposition condition $As^{+}$ dose for the doping of the polysilicon, and the annealing using RTP system. The vertical depth profiles of the fabricated diode are obtained by SIMS. The eleotrical characteristics are analyzed in trims of the ideality factor of diode (n), contact resistance arid reverse leakage current. The $As_{+}$ dose for the formation of good junction is current. The $As^{+}$ dose for the formation of goodjunctions is about 1∼2${\times}$$10^{16}$$cm^{-2}$ at given RTA condition ($1100^{\circ}C$, 10 sec). The $n^{+}$-p structure is successfully applied to the self-aligned bipolar device adopting a single polysilicon technology.

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간극결합채널의 개폐기전 (Mechanism for Gating of Gap Junction Channel.)

  • 오승훈
    • 생명과학회지
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    • 제14권5호
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    • pp.882-890
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    • 2004
  • 간극결합(gap junction)은 이웃하는 두 세포사이에 형성된 막 구조물로 이를 통하여 각종 이온들과 여러 가지 분자들이 통과한다. 일반적으로 알려진 세포의 이온채널(예를 들어 $Na^{+}$ 이온채널과$K^+$이온채널)과 구별하여 두 세포사이에 형성된 간극결합을 세포간 채널(intercellular channel)이라고도 부른다. 간극결합채널(gap junction channel)은 단순히 수동적으로 열려있는 통로가 아니라 여러 가지 자극 즉 pH, 칼슘이온(calcium ion), 전압(voltage), 그리고 화학적인 변형(주로 인산화, phosphorylation)에 의해서 개폐(gating, opening and closing)가 조절되는 이온채널이다. 그 가운데서도 전압에 의한 간극결합채널 개폐 변화가 가장 많이 연구되었다. 세포안과 바깥에 형성된 전압차이(membrane potential, $V_m$) 보다는 주로 두 세포 사이에 형성된 전압차이(transjunctional voltage, $V_j$)에 의해서 간극결합채널은 민감하게 반응한다. 본 총설에서는 간극결합채널의 일반적인 특성을 정리해보고 전압-의존적인(voltage-dependent) 채널개폐에 관한 기전을 논의하고자 한다.

Thin Film Amorphous/Bulk Crystalline Silicon Tandem Solar Cells with Doped nc-Si:H Tunneling Junction Layers

  • 이선화;이준신;정채환
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.257.2-257.2
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    • 2015
  • In this paper, we report on the 10.33% efficient thin film/bulk tandem solar cells with the top cell made of amorphous silicon thin film and p-type bulk crystalline silicon bottom cell. The tunneling junction layers were used the doped nanocrystalline Si layers. It has to allow an ohmic and low resistive connection. For player and n-layer, crystalline volume fraction is ~86%, ~88% and dark conductivity is $3.28{\times}10-2S/cm$, $3.03{\times}10-1S/cm$, respectively. Optimization of the tunneling junction results in fill factor of 66.16 % and open circuit voltage of 1.39 V. The open circuit voltage was closed to the sum of those of the sub-cells. This tandem structure could enable the effective development of a new concept of high-efficiency and low cost cells.

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