• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
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• pp.100-101
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• 2007

Polymer thick film capacitors were successfully fabricated by using ink-jet printing and screen printing technology. First, a bottom electrode was patterned by ink-jet printing of a nano-sized silver ink. Next, a dielectric layer was formed by the screen printing, then a top electrode was pattern by ink-jet printing of a nano-sized silver ink. The printed area of the dielectric layers were changed into $2{\times}2m^2$and $4{\times}2m^2$, and also the area of the electrodes were patterned with $1{\times}1mm^2$ and $1{\times}3mm^2$. The thickness of the printed dielectric layer was ranged from 1.1 to $1.4{\mu}m$. The analysis of capacitances verified that the capacitances was proportional to the area of the printed electrode. The capacitances of the fabricated capacitors resulted in one third of the calculated capacitances.

• Journal of Power Electronics
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• 제15권2호
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• pp.389-398
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• 2015

This paper presents a 1.92 kW resonant converter for medium voltage applications that uses low voltage stress MOSFETs (500V) to achieve zero voltage switching (ZVS) turn-on. In the proposed converter, four MOSFETs are connected in series to limit the voltage stress of the power switches at half of the input voltage. In addition, three resonant circuits are adopted to share the load current and to reduce the current stress of the passive components. Furthermore, the transformer primary and secondary windings are connected in series to balance the output diode currents for medium power applications. Split capacitors are adopted in each resonant circuit to reduce the current stress of the resonant capacitors. Two balance capacitors are also used to automatically balance the input capacitor voltage in every switching cycle. Based on the circuit characteristics of the resonant converter, the MOSFETs are turned on under ZVS. If the switching frequency is less than the series resonant frequency, the rectifier diodes can be turned off under zero current switching (ZCS). Experimental results from a prototype with a 750-800 V input and a 48V/40A output are provided to verify the theoretical analysis and the effectiveness of the proposed converter.

• Journal of Power Electronics
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• 제15권2호
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• pp.411-418
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• 2015

In this paper, a new method for the online estimation of equivalent series resistances (ESR) of the DC-link capacitors in induction machine (IM) drive systems with a front-end diode rectifier is proposed, where the ESR estimation is conducted during the regenerative operating mode of the induction machine. In the first place, a regulated AC current component is injected into the q-axis current component of the induction machine, which induces the current and voltage ripple components in the DC-link. By processing these AC signals through digital filters, the ESR can be estimated by a recursive least squares (RLS) algorithm. To acquire the AC voltage across the ESR, the DC-link voltage needs to be measured at a double sampling frequency. In addition, the ESR current is simply reconstructed from the stator currents and switching states of the inverter. Experimental results have shown that the estimation error of the ESR is about 1.2%, which is quite acceptable for condition monitoring of the capacitor.

• Journal of Power Electronics
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• 제11권3호
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• pp.264-270
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• 2011

In this paper a novel passive snubber is proposed, which can suppress the voltage spike across the bridge leg of the isolated full-bridge boost topology. The snubber is composed of capacitors, inductors and diodes. Two capacitors connected in series are used to absorb the voltage spike and the energy of each capacitor can be transferred to the load during one switching cycle by the resonance of the inductors and capacitors. The operational principle of the passive snubber is analyzed in detail based on a three-phase power factor correction (PFC) converter, and the design considerations of both the converter and the snubber are given. Finally, a 3kW laboratory-made prototype is built. The experimental results verify the theoretical analysis and evaluations. They also prove the validity and feasibility of the proposed methods.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 제4회 영호남학술대회 논문집
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• pp.109-122
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• 2002

The standard capacitor must have not only precise value of the capacitance but also the basic properties of low dielectric loss tangent. In the reforming process of capacitors, the dielectric loss tangent must be also reformed. In this paper, the development of standard capacitors of 10 and 100pF for the dielectric loss tangent standard using $Al_{2}O_{3}$ Crystal and the measurement of dielectric loss tangent are discussed. The dielectric loss tangent depends upon the surface between electrode and dielectric in capacitor. With using the Electric Field Simulator, precise design values of electrode are simulated. For the purpose of measuring capacitance effect just in the dielectric, 3-Terminal and 4-Terminal Pair configuration are applied respectively at the electrode and the connector for the measuring equipment. As stated above method, the standard capacitors of 10 and l00pF for the establishment of the dielectric loss tangent standard using the $Al_{2}O_{3}$ Crystal are made with low dielectric loss tangent less than 10-4.

• 한국진공학회지
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• 제8권3A호
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• pp.238-244
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• 1999

Pt/SBT/Pt capacitors were fabricated using the MOD-derived $SrBi_{2x}Ta_2O_9$ (SBT) films and their ferroelectic and leakage current characteristics were investigated with post annealing at 400~$800^{\circ}C$. Although the MOD-derived SBT film exhibited the hysteresis loop typical for the leaky film, the well-saturated ferroelectric hysteresis loop could be obtained by post annealing the Pt/SBT/Pt capacitors at $550^{\circ}C$~$800^{\circ}C$. The remanent polarization $2P_r$ of the SBT film exhibited a maximum value of 9.72$\mu\textrm{cm}^2$ with post annealing at $600^{\circ}C$, and then decreased with increasing the post annealing temperature above $600^{\circ}C$. The MOD-derived SBT films exhibited the high leakage current density of ~$10^{-3} \textrm{A/cm}^2$ at 75kV/cm. With post annealing the Pt/SBT/Pt capacitor at 600~$800^{\circ}C$, however, the leakage current density decreased remarkably to less than $10^{-6}\textrm{A/cm}^2$ at 75kV/cm.

• 전자공학회논문지D
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• 제36D권4호
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• pp.63-69
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• 1999

본 연구에서는 급속 열처리 온도와 분위기를 변화 시키면서 Pt/BST/Pt 커패시터의 전기적 특성 변화를 알아보고, 특성 개선에 대한 체계적인 원인을 분석하였다. 급속 열처리의 온도와 분위기에 따른 Pt/BST/Pt 커패시터의 전기적 특성 변화는 BST 박막 내의 산소 결핍과 관련이 있는 것으로 보인다. 이러한 사실을 확인하기 위하여 450℃, 20mttorr에서 산소와 산소 플라즈마 분위기에서 각각 열처리를 수행한 후 전기적 특성을 비교하였다. 산소 플라즈마에서 열처리를 수행한 BST 커패시터의 누설전류 전류밀도가 단순히 산소 분위기에서 열처리 한 시편과 비교하여 훨씬 낮았다. 또한, 산소 분위기에서 열처리를 수행한 BST 커패시터의 유전율이 약14%정도 감소한 반면, 산소 플라즈마에서 열처리를 수행한 유전율은 거의 감소가 없었다. 위의 결과는 반응성이 강한 산소 원자를 많이 포함하고 있는 산소 플라즈마가 산소 결핍을 보상하는데 있어서 매우 효과적임을 시사하고 있다. 결과적으로, BST박막 내의 산소 결핍이 BST커패시터의 누설전류 밀도와 유전율에 큰 영향을 미치고 있음을 추정할 수 있다. 그리고, 산소 플라즈마에서 열처리를 수행함으로써 유전율의 감소 없이 누설전류 밀도가 크게 개선된 BST커패시터를 얻을 수 있었다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1999년도 추계학술발표강연 및 논문개요집
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• pp.128-128
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• 1999

• 한국재료학회:학술대회논문집
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• 한국재료학회 1998년도 한국재료학회 춘계학술발표강연 및 논문개요집
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• pp.92-92
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• 1998

• Carbon letters
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• 제6권4호
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• pp.257-268
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• 2005