• 제목/요약/키워드: Y-Junction

검색결과 2,967건 처리시간 0.03초

Silicon P-N Junction Diode에 대한 X-Ray 및 Gamma-Ray 의 Dose Ratec 측정 (Measurements of X-Ray and Gamma Ray Dosse Rate by the Silicon P-N Junction Diode)

  • 정만영;김덕진
    • 전기의세계
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    • 제13권3호
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    • pp.13-20
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    • 1964
  • The measurements of X-ray and Gamma-ray Dose Rate have been successfully made by measuring the short circuit current of the Silicon P-N Junction Diode being irradiated. The short circuit current flows when a silicon P-N Junction Diode is irradiated by X-ray of Gammaray radiations due to photovoltaic effect. A brief analysis is given in order to verify the proportionality of a short circuit current to the Dose Rate. Using this method, measurements of X-ray Dose Rate were carried out in the range of 0.05-1600 r/m successfully. The calibration was made by comparing with Victoreen condenser r-meter. Some advantages in this Dose Rate meter over a condenser r-meter were found. One can measure a continous variation of X-ray Dose Rate with this rate meter at the control console of X-ray device.

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엑시머 레이져를 이용한 극히 얕은 접합과 소스, 드레인의 형성과 50nm 이하의 극미세 n-MOSFET의 제작 (Ultra Shallow Junction wish Source/Drain Fabricated by Excimer Laser Annealing and realized sub-50nm n-MOSFET)

  • 정은식;배지철;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.562-565
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    • 2001
  • In this paper, novel device structures in order to realize ultra fast and ultra small silicon devices are investigated using ultra-high vacuum chemical vapor deposition(UHVCVD) and Excimer Laser Annealing (ELA). Based on these fundamental technologies for the deep sub-micron device, high speed and low power devices can be fabricated. These junction formation technologies based on damage-free process for replacing of low energy ion implantation involve solid phase diffusion and vapor phase diffusion. As a result, ultra shallow junction depths by ELA are analyzed to 10~20nm for arsenic dosage(2${\times}$10$\_$14//$\textrm{cm}^2$), exciter laser source(λ=248nm) is KrF, and sheet resistances are measured to 1k$\Omega$/$\square$ at junction depth of 15nm and realized sub-50nm n-MOSFET.

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밀리미터파 믹서용 초전도 턴넬 접합 설계와 제작에 관한 연구 (A Study on the Fabrication and Design of Superconducting Tunnel junction for Millimeter Wave Mixers)

  • 한석태;이창훈;서정빈;박동철
    • 전자공학회논문지A
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    • 제30A권10호
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    • pp.12-19
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    • 1993
  • Because of their high sensitivity and moderate bandwidth, superconducting receivers with SIS (Superconductor Insulator Superconductor) tunnel junction mixer are now widely used for millimeter wave radio astronomy. In this paper we have introduced how to determine the parameters of SIS tunnel junction which have to be optimized to achieve a good mixer performance. From these results of optimized junction parameters determined by this methods, SIS junctions which consist of a series array of four Nb/Al-AlOx/Nb junctions with each area 3.4${\mu}m^{2}$ have been fabricated by SNEP (Selective Niobium Etching Process) and RIE (Reactive Ion Eching). Also we have tested their DC current-voltage characteristics. These SIS junctions will be used as a mixer for 100GHz band cosmic waves receiver.

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Investigation of Junction-less Tunneling Field Effect Transistor (JL-TFET) with Floating Gate

  • Ali, Asif;Seo, Dongsun;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권1호
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    • pp.156-161
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    • 2017
  • This work presents a novel structure for junction-less tunneling field effect transistor (JL-TFET) with a floating gate over the source region. Introduction of floating gate instead of fixed metal gate removes the limitation of fabrication process suitability. The proposed device is based on a heavily n-type-doped Si-channel junction-less field effect transistor (JLFET). A floating gate over source region and a control-gate with optimized metal work-function over channel region is used to make device work like a tunnel field effect transistor (TFET). The proposed device has exhibited excellent ID-VGS characteristics, ION/IOFF ratio, a point subthreshold slope (SS), and average SS for optimized device parameters. Electron charge stored in floating gate, isolation oxide layer and body doping concentration are optimized. The proposed JL-TFET can be a promising candidate for switching performances.

Fabrication of Vertical Organic Junction Transistor by Direct Printing Method

  • Shin, Gunchul;Kim, Gyu-Tae;Ha, Jeong Sook
    • Bulletin of the Korean Chemical Society
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    • 제35권3호
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    • pp.731-736
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    • 2014
  • An organic junction transistor with a vertical structure based on an active layer of poly(3-hexylthiophene) was fabricated by facile micro-contact printing combined with the Langmuir-Schaefer technique, without conventional e-beam or photo-lithography. Direct printing and subsequent annealing of Au-nanoparticles provided control over the thickness of the Au electrode and hence control of the electrical contact between the Au electrode and the active layer, ohmic or Schottky. The junction showed similar current-voltage characteristics to an NPN-type transistor. Current through the emitter was simply controllable by the base voltage and a high transconductance of ~0.2 mS was obtained. This novel fabrication method can be applied to amplifying or fast switching organic devices.

경계항복 억제를 위한 평판형 InP/InGaAs 애벌랜치 포토다이오드의 곡률 효과 분석 (Investigation of Curvature Effect on Planar InP/InGaAs Avalanche Photodiodes for Edge Breakdown Suppression)

  • 이봉용;정지훈;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.206-209
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    • 2002
  • With the progress of semiconductor processing technology, avalanohe photodiodes (APDs) based on InP/InGaAs are used for high-speed optical receiver modules. Planar-type APDs give higher reliability than mesa-type APDs. However, Planar-type APDs are struggled with a problem of intensed electric field at the junction curvature, which causes edge breakdown phenomena at the junction periphery. In this paper, we focused on studying the effects of junction curvature for APDs performances by different etching processes followed by single diffusion to from p-n junction. The performance of each process is characterized by observing electric field profiles and carrier generation rates. From the results, it can be understood to predict the optimum structure, which can minimize edge breakdown and improve the manufacturability.

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기판 냉각과 비냉각으로 제작된 $Nb/Al-Al_2O_3/Nb$ 조셉슨 접합 어레이의 특성 (Characterization of $Nb/Al-Al_2O_3/Nb$ Josephson junction arrays fabricated With and Without cooling substrate)

  • 홍현권;김규태;박세일;이기영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 C
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    • pp.1402-1404
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    • 2001
  • Josephson junction arrays of the type $Nb/Al-Al_2O_3/Nb$ were prepared by DC magnetron sputtering. The tunnel barrier was formed by in-situ thermal oxidation. Individual junctions were defined using selective niobium etching process(SNEP). The characteristic curves of Josephson junction arrays fabricated with and without cooling the substrate were represented. The junctions deposited without cooling showed poor characteristics(high leakage current, low gap voltage), and a high quality Josephson junction array of 2,000 junctions with high hysteresis was obtained with cooling and when operated at 74.6 GHz, it generated stable quantized voltage steps up to 2.2 V.

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유동망 시스템 해석을 위한 경계처리에 대한 보존형 유한체적법 (CONSERVATIVE FINITE VOLUME METHOD ON BOUNDARY TREATMENTS FOR FLOW NETWORK SYSTEM ANALYSES)

  • 홍석우;김종암
    • 한국전산유체공학회:학술대회논문집
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    • 한국전산유체공학회 2008년도 학술대회
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    • pp.19-26
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    • 2008
  • From numerical point of view on flow network system analyses, stagnation properties are not preserved along streamlines across geometric discontinuities. Hence, GJM and DTM using ghost cell and thermodynamic relations are developed to preserve the stagnation enthalpy for the boundaries, such as the interfaces between junction and branches and the interface between two pipes of different cross-sections in serial pipelines. Additionally, the resolving power and efficiencies of the 2nd order Godunov type FV schemes are investigated and estimated by the tracing of the total mechanical energy during calculating rapid transients. Among the approximate Riemann solvers, RoeM is more suitable with the proposed boundary treatments especially for junction than Roe's FDS because of its conservativeness of stagnation enthalpy across geometric discontinuities.

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유동망 시스템 해석을 위한 경계처리에 대한 보존형 유한체적법 (CONSERVATIVE FINITE VOLUME METHOD ON BOUNDARY TREATMENTS FOR FLOW NETWORK SYSTEM ANALYSES)

  • 홍석우;김종암
    • 한국전산유체공학회:학술대회논문집
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    • 한국전산유체공학회 2008년 추계학술대회논문집
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    • pp.19-26
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    • 2008
  • From numerical point of view on flow network system analyses, stagnation properties are not preserved along streamlines across geometric discontinuities. Hence, GJM and DTM using ghost cell and thermodynamic relations are developed to preserve the stagnation enthalpy for the boundaries, such as the interfaces between junction and branches and the interface between two pipes of different cross-sections in serial pipelines. Additionally, the resolving power and efficiencies of the 2nd order Godunov type FV schemes are investigated and estimated by the tracing of the total mechanical energy during calculating rapid transients. Among the approximate Riemann solvers, RoeM is more suitable with the proposed boundary treatments especially for junction than Roe's FDS because of its conservativeness of stagnation enthalpy across geometric discontinuities.

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Design of Main Body and Edge Termination of 100 V Class Super-junction Trench MOSFET

  • Lho, Young Hwan
    • 전기전자학회논문지
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    • 제22권3호
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    • pp.565-569
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    • 2018
  • For the conventional power MOSFET (metal-oxide semiconductor field-effect transistor) device structure, there exists a tradeoff relationship between specific on-state resistance (Ron,sp) and breakdown voltage (BV). In order to overcome this tradeoff, a super-junction (SJ) trench MOSFET (TMOSFET) structure with uniform or non-uniform doping concentration, which decreases linearly in the vertical direction from the N drift region at the bottom to the channel at the top, for an optimal design is suggested in this paper. The on-state resistance of $0.96m{\Omega}-cm2$ at the SJ TMOSFET is much less than that at the conventional power MOSFET under the same breakdown voltage of 100V. A design methodology for the edge termination is proposed to achieve the same breakdown voltage and on-state resistance as the main body of the super-junction TMOSFET by using of the SILVACO TCAD 2D device simulator, Atlas.