• Title/Summary/Keyword: Wideband Oscillator

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Design and Fabrication of the Wide-band YIG Tuned Oscillator (YIG 공진기를 이용한 고주파 광대역 발진기 설계 및 제작)

  • 이문규;염경환;남상욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.9
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    • pp.1710-1718
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    • 1994
  • In this paper, a broadband tunable YIG(Yittrium Iron Garnet) oscillator is designed and fabricated. To design an YTO(YIG Tuned Oscillator), a suitable YIG resonator is selected according to the design oscillation range and its equivalent R, L, C resonant circuit parameters are obtained through the measurement of its resonance characteristic. Using the equivalent circuit, the wideband topology which suppresses the parasitic oscillation is selected and implemented. The designed circuit is simulated by HBT(Harmoic Balance Technique) using EEsof's jOMEGA. The YTO thus fabricated has the wide oscillation range from 1.4 GHz to 4 GHz, and its linearity is 0.5% in the oscillation range. The phase noise is below 105dBc at 100kHz offset.

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Implementation and Design of Wideband IFIU using Aperture Open Loop Resonator and Reversed Phase Technique (역 위상 기법과 Aperture를 갖는 개방형 루프 공진기를 사용한 광대역 IF 모듈 설계 및 제작)

  • 김영완
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.11
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    • pp.17-23
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    • 2004
  • The implementation and design of the wideband IFIU using aperture open loop resonator and reversed phase technique to reduce the local oscillator leakage signal was represented in this paper. The local oscillator leakage signal is generated in stage of frequency conversion, especially in frequency conversion of fully digital modulation signal close to DC signal. The leakage signal and spurious signals, which have effects on adjacent channel or in-band channel as interference signals, were reduced below -60 dBc for 45 Mbps and 155 Mbps IF interface units. The group delay for both IFIUs shows low ripple characteristics of 15 ns and 8 ns, respectively. Also, the amplitude ripple characteristic in 150 MHz bandwidth with L-band center frequency satisfies the required specification of 2 dB. The implemented IFIU provides the required specifications for wideband satellite communication system.

Voltage Controlled Injection-Locked Oscillator Design at 2.4 GHz Band for Wideband Applications (광대역 응용을 위한 2.4 GHz 대역 전압 제어 주입 동기 발진기 설계)

  • Yoon, Won-Sang;Lee, Hun-Sung;Lee, Hee-Jong;Pyo, Seong-Min;Kim, Young-Sik;Han, Sang-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.3
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    • pp.292-298
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    • 2011
  • In this paper, a voltage controlled injection-locked oscillator(VC-ILO) is proposed for wideband applications. From the control of the free-running frequency by a varactor diode, the wide frequency locking range can be obtained for low-level injected signals. The proposed VC-ILO is implemented on an FR-4 substrate with a thickness of 0.8 mm. The free-running frequencies of the oscillator is 2.39~2.52 GHz at the control voltage of 0~5 V. While the frequency locking range of over 50 MHz is presented for -10 dBm injected signal level at a fixed frequency, the locking range of over 90 MHz can be achieved for -30 dBm by controlling the free-running frequency.

Wideband Colpitts Voltage Controlled Oscillator with Nanosecond Startup Time and 28 % Tuning Bandwidth for Bubble-Type Motion Detector (나노초의 발진 기동 시간과 28 %의 튜닝 대역폭을 가지는 버블형 동작감지기용 광대역 콜피츠 전압제어발진기)

  • Shin, Im-Hyu;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1104-1112
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    • 2013
  • This paper presents a wideband Colpitts voltage controlled oscillator(VCO) with nanosecond startup time and a center frequency of 8.35 GHz for a new bubble-type motion detector that has a bubble-layer detection zone at the specific distance from itself. The VCO circuit consists of two parts; one is a negative resistance part with a HEMT device and Colpitts feedback structure and the other is a resonator part with a varactor diode and shorted shunt microstrip line. The shorted shunt microstrip line and series capacitor are utilized to compensate for the input reactance of the packaged HEMT that changes from capacitive values to inductive values at 8.1 GHz due to parasitic package inductance. By tuning the feedback capacitors which determine negative resistance values, this paper also investigates startup time improvement with the negative resistance variation and tuning bandwidth improvement with the reactance slope variation of the negative resistance part. The VCO measurement shows the tuning bandwidth of 2.3 GHz(28 %), the output power of 4.1~7.5 dBm and the startup time of less than 2 nsec.

A design of voltage controlled hair-pin resonator oscillator for the use of clock precovery/data regeneration circuit in 10 Gbps SDH fiber optic systems (10 Gbps SDH 광전송시스템을 위한 클럭보상/데이타 재생회로용 전압제어 hair-pin 공진 발진기의 설계)

  • 연영호;이수열;이주열;유태완;박문수;홍의석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.5
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    • pp.1304-1316
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    • 1996
  • In this paper, A VCO(Voltage Controlled Oscillator) in use of clock recovery/data regeneration circuit for 10 Gbps fiber optic receivers was developed. The improved hair-pin resonator with a parallel coupled lines, which has been applied to microstrip filters, was used as a resonance part. As a frequcncy tuning device by substituting 3-terminalMESFET vaaractor for varactor diode, an MMIC manufacturing process will be simplified. Since a hair-pin resonator is planar type compared to the dielectric resonator and has a relatively flat reactance verus frequency, it will be favorable to apply a hair-pin resonator to an MMIC, in addition wideband frequency tuning range is able to be obtained.

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A Low-Power Low-Complexity Transmitter for FM-UWB Systems

  • Zhou, Bo;Wang, Jingchao
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.2
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    • pp.194-201
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    • 2015
  • A frequency modulated ultra-wideband (FM-UWB) transmitter with a high-robust relaxation oscillator for subcarrier generation and a dual-path Ring VCO for RF FM is proposed, featuring low power and low complexity. A prototype 3.65-4.25 GHz FM-UWB transceiver employing the presented transmitter is fabricated in $0.18{\mu}m$ CMOS for short-range wireless data transmission. Experimental results show a bit error rate (BER) of $10^{-6}$ at a data rate of 12.5 kb/s with a communication distance of 60 cm is achieved and the power dissipation of 4.3 mW for the proposed transmitter is observed from a 1.8 V supply.

A Wideband Clock Generator Design using Improved Automatic Frequency Calibration Circuit (개선된 자동 주파수 보정회로를 이용한 광대역 클록 발생기 설계)

  • Jeong, Sang-Hun;Yoo, Nam-Hee;Cho, Seong-Ik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.2
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    • pp.451-454
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    • 2011
  • In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

Design and Implementation of Wideband Digital Frequency Synthesizer for DVB-RCS (DVB-RCS 전송을 위한 광대역 디지털 주파수 합성기 설계 및 구현)

  • Kim, Young-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.2
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    • pp.223-228
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    • 2007
  • The Digital Frequency Synthesizer(DFS) that generates the wideband signal with high speed frequency hopping rate and high frequency resolution characteristics was designed and implemented in this paper The DFS was applied as local oscillator for direct frequency conversion IF modules of DVB-RCS, which directly generates the transmission immediate frequency signal by using DDS and wideband PLL technologies. The DDS technology provides high speed frequency hopping rate and high frequency resolution characteristics, which are also the DVB-RCS requirement. The wideband PLL technology also provides the wideband signal generation, which is a necessity for direct frequency conversion modules. The implemented DFS provides the spurious suppression characteristic of -50 dBc and less, frequency resolution of 0.233 Hz and frequency hopping rate of 125 ns, respectively. Also the DFS represents the amplitude flatness of 3 dB and less in the pass-band, and phase noise characteristic of -75 dBc/Hz at 1 kHz frequency offset.

Wideband CMOS Voltage-Controlled Oscillator(VCO) for Multi-mode Vehicular Terminal (융복합 차량 수신기를 위한 광대역 전압제어 발진기)

  • Choi, Hyun-Seok;Diep, Bui Quag;Kang, So-Young;Jang, Joo-Young;Bang, Jai-Hoon;Oh, Inn-Yul;Park, Chul-Soon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.6
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    • pp.63-69
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    • 2008
  • Reconfigurable RF one-chip solutions have been researched with the objective of designing for smaller-sized and more economical RF transceiver and it can be applied to a vehicular wireless terminal. The proposed voltage-controlled oscillator satisfies the targeted frequency range ($4.2{\sim}5.4\;GHz$) and the frequency planning which correspond to the standards such as CDMA(IS-95), PCS, GSM850, EGSM, WCDMA, WLAN, Bluetooth, WiBro, S-DMB, DSRC, GPS, and DVB-H/DMB-H/L(L Band). In order to improve phase noise performance, PMOS is adopted in the cross-coupled pair, the tail current source and MOS varactor in this VCO and differential-typed switching is proposed in capacitor array. Based on the measurement results, a total power dissipation is $5.3{\sim}6.0\;mW$ at 1.8 V power supply voltage. The oscillator is tuned from 4.05 to 5.62 GHz; The tuning range is 33%. The phase noise is -117.16 dBc/Hz at 1 MHz offset frequency and the FOM (Figure Of Merit) is $-180.84{\sim}-180.5$.

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Implementation of Digital Frequency Synthesizer for High Speed Frequency Hopping (DDS를 이용한 고속 주파수 Hopping용 디지털 주파수 합성기 구현)

  • Kim Young-Wan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.607-610
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    • 2006
  • The Digital Frequency Synthesizer(DFS) that generates the wideband signal with hish speed frequency hopping rate and high frequency resolution characteristics was implemented in this paper. The DFS was applied as local oscillator for direct frequency conversion IF modules of DVB-RCS, which directly generates the transmission immediate frequency signal by using DDS and wideband PLL technologies. The DDS technology provides high speed frequency hopping rate and high frequency resolution characteristics, which ate also the DVB-RCS requirement. The wideband PLL technology also provides the wideband signal generation, which is a necessity for direct frequency conversion modules. The implemented DFS provide the spurious suppression characteristic of -50 dBc, frequency resolution of 0.233 Hz and frequency hopping rate of 125 ns, respectively. Also the DFS represent the amplitude flatness of 3 dB and less in the pass-band and phase noise characteristic of -75 dBc/Hz at 1 kHz frequency offset.

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