• Journal of the Korean Society for Precision Engineering
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• v.21 no.5
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• pp.24-31
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• 2004

Masking effect of the nanoscratched silicon (100) surface was studied and applied to a maskless nanofabrication technique. First, the surface of the silicon (100) was machined by ductile-regime nanomachining process using the scratch option of the Nanoindenter${ \circledR}$ XP. To clarify the possibility of the nanoscratched silicon surfaces for the application to wet etching mask, the etching characteristic with a KOH solution was evaluated at room temperature. After the etching process, the convex nanostructures were made due to the masking effect of the mechanically affected layer. Moreover, the height and the width of convex structures were controlled with varying normal loads during nanoscratch.

• Journal of Welding and Joining
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• v.30 no.3
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• pp.26-31
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• 2012

Three-dimensional integrated circuit (3D IC) technology has become increasingly important due to the demand for high system performance and functionality. We have evaluated the effect of Buffered oxide etch (BOE) on the interfacial bonding strength of Cu-Cu pattern direct bonding. X-ray photoelectron spectroscopy (XPS) analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE 2min. Two 8-inch Cu pattern wafers were bonded at $400^{\circ}C$ via the thermo-compression method. The interfacial adhesion energy of Cu-Cu bonding was quantitatively measured by the four-point bending method. After BOE 2min wet etching, the measured interfacial adhesion energies of pattern density for 0.06, 0.09, and 0.23 were $4.52J/m^2$, $5.06J/m^2$ and $3.42J/m^2$, respectively, which were lower than $5J/m^2$. Therefore, the effective removal of Cu surface oxide is critical to have reliable bonding quality of Cu pattern direct bonds.

• Korean Journal of Materials Research
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• v.29 no.11
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• pp.697-702
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• 2019

In this study, using a wet chemical process, we evaluate the effectiveness of different solution concentrations in removing layers from a solar cell, which is necessary for recovery of high-purity silicon. A 4-step wet etching process is applied to a 6-inch back surface field(BSF) solar cell. The metal electrode is removed in the first and second steps of the process, and the anti-reflection coating(ARC) is removed in the third step. In the fourth step, high purity silicon is recovered by simultaneously removing the emitter and the BSF layer from the solar cell. It is confirmed by inductively coupled plasma mass spectroscopy(ICP-MS) and secondary ion mass spectroscopy(SIMS) analyses that the effectiveness of layer removal increases with increasing chemical concentrations. The purity of silicon recovered through the process, using the optimal concentration for each process, is analyzed using inductively coupled plasma atomic emission spectroscopy(ICP-AES). In addition, the silicon wafer is recovered through optimum etching conditions for silicon recovery, and the solar cell is remanufactured using this recovered silicon wafer. The efficiency of the remanufactured solar cell is very similar to that of a commercial wafer-based solar cell, and sufficient for use in the PV industry.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.4
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• pp.24-31
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• 2004

The objective of this work is to suggest a mastless pattern fabrication technique using the combination of machining by Nanoindenter(equation omitted) XP and HF wet etching. Sample line patterns were machined on a borosilicate surface by constant load scratch (CLS) of the Nanoindenter(equation omitted) XP with a Berkovich diamond tip, and they were etched in HF solution to investigate chemical characteristics of the machined borosilicate surface. All morphological data of scratch traces were scanned using atomic force microscope (AFM).

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.27 no.3
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• pp.143-147
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• 2017

To evaluate surface characteristics and improve crystalline quality of AlN single crystal grown by physical vapor transport (PVT) method, wet chemical etching process using $KOH/H_2O_2$ mixture in a low temperature condition and thermal annealing process was proceeded respectively. Conventional etching process using strong base etchant at a high temperature (above $300^{\circ}C$) had formed over etching phenomenon according to crystalline quality of materials. When it occurred to over etching phenomenon, it had a low reliability of dislocation density because it cannot show correct number of etch pits per estimated area. Therefore, it was proceeded to etching process in a low temperature (below $100^{\circ}C$) using $H_2O_2$ as an oxidizer in KOH aqueous solution and to be determined optimum etching condition and dislocation density via scanning electron microscope (SEM). For improving crystalline quality of AlN single crystal, thermal annealing process was proceeded. When compared with specimens as-prepared and as-annealed, full width at half maximum (FWHM) of the specimen as-annealed was decreased exponentially, and we analyzed the mechanism of this process via double crystal X-ray diffraction (DC-XRD).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.644-647
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• 2001

Amorphous As-Ge-Se-S thin films have been studied with the aim of identifying optimum etching condition which can be used to produce holographic grating structure for use as diffractive optical elements. In this study, holographic gratings have been formed using He-Ne laser(632.8nm), and fabricated by the method of wet etching using NaOH etchant with various concentration(0.26N, 0.33N, 0.40N). The diffraction efficiency was obtained by +1st order intensity of the diffracted beam. The formed grating profiles were observed by atomic force microscope and showed that the expected grating profile could be achieved by controlling the etching time. Over-etching resulted in under-cutting of the grating lines. The highest 1st order diffraction efficiency for these gratings was about 5.05%.

• Journal of the Korean Vacuum Society
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• v.19 no.2
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• pp.114-120
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• 2010

Conventional surface texturing in crystalline silicon solar cell have been use wet texturing by Alkali or Acid solution. But conventional wet texturing has the serious issue of wafer breakage by large consumption of wafer in wet solution and can not obtain the reflectance below 10% in multi crystalline silicon. Therefore it is focusing on RIE texturing, one method of dry etching. We developed large scale plasma RIE (Reactive Ion Etching) equipment which can accommodate 144 wafers (125 mm) in tray in order to provide surface texturing on the silicon wafer surface. Reflectance was controllable from 3% to 20% in crystalline silicon depending on the texture shape and height. We have achieved excellent reflectance below 4% on the weighted average (300~1,100 nm) in multi crystalline silicon using plasma texturing with gas mixture ratio such as $SF_6$, $Cl_2$, and $O_2$. The texture shape and height on the silicon wafer surface have an effect on gas chemistry, etching time, RF frequency, and so on. Excellent conversion efficiency of 16.1% is obtained in multi crystalline silicon by RIE process. In order to know the influence of RF frequency with 2 MHz and 13.56 MHz, texturing shape and conversion efficiency are compared and discussed mutually using RIE technology.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.294-294
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• 2013

소수성을 띄는 표면은 자연으로부터 시작된 연구이다. 연잎, 소금쟁이 다리, 매미 날개 등 많은 자연의 표면은 150o보다 높은 접촉각을 지니기 때문에 물에 대한 반발이 심해져 약간의 기울임에도 쉽게 물방울이 굴러 떨어지고 이때 먼지를 제거할 수 있다. 자연현상을 이용해 물질 표면의 소수성 제어에 대한 다양한 연구가 진행 중이다. 친수성과 소수성은 일반적으로 표면에서 물방울의 contact angle 측정으로 확인 할 수 있다. Contact angle이 $90^{\circ}$ 작을 경우 친수성, $90^{\circ}$보다 클 경우 소수성이라고 한다. 이러한 기술을 이용해서 solar cell, 자동차 유리, 건물외벽, 등 다양한 분야에서 사용하고 있으며, 소수성 구조를 만드는 방법으로는 laser ablation, wet etching, 리소그라피 공정이 있는데, laser ablation의 경우 가격이 비싸다는 단점을 가지고 있으며, 반면 가격이 저렴한 wet etching의 경우 제어가 힘들다는 단점을 지니고 있다. 리소그라피 공정은 비싼 비용과 시간을 소비해야 하는 단점을 지니고 있다. 본 연구에서는 이러한 단점들을 개선하기 위해 공정 시간의 감소와, 저 비용으로 제작이 가능한 RIE (Recative Ion Etching)로 피라미드 구조를 만들었다. 형성된 구조물에 투명하고 균일하며, 낮은 계면에너지를 갖고 있는 PDMS (polydimethelsiloxine)로 mold을 수행하였다. RIE를 이용한 표면 구조는 Gas, Flow rate, Pressure, Power, Time 등을 조절하여 단결정 실리콘 기판 위에 피라미드의 크기를 조절하였다. 피라미드의 크기가 커짐에 따라 물과 PDMS가 닿는 면적이 줄어들면서 높은 소수성을 가지게 되는데, 높은 소수성 구조를 가지는 피라미드 형상을 찾기 위한 실험을 진행하였다. RIE 조건은 Flow rate: 30 sccm, Temperature: $10^{\circ}C$ Pressure: 100 mTorr, Power: 200 W, Process Time: 5~50 min으로 조절하며 공정을 수행하였고 RIE공정 후 SAMs (Self-Assembly Monolayers)을 진행하였으며, 마지막으로 PDMS를 이용하여 mold공정을 진행하였다. 그리고 SEM (Scanning Electron Microscope)장비를 이용하여 Etching된 단면을 관찰하였으며, 접촉각을 측정하였다. Process Time을 50 min로 공정하였을 때, 측정된 접촉각은 $134^{\circ}$였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.319-320
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• 2012

Large aperture optical modulator called optical shutter is a key component to realize time-of-flight (TOF) based three dimensional (3D) imaging systems [1-2]. The transmission type electro-absorption modulator (EAM) is a prime candidate for 3D imaging systems due to its advantages such as small size, high modulation performance [3], and ease of forming two dimensional (2D) array over large area [4]. In order to use the EAM for 3D imaging systems, it is crucial to remove GaAs substrate over large area so as to obtain high uniformity modulation performance at 850 nm. In this study, we propose and experimentally demonstrate techniques for backside etching of GaAs substrate over a large area having high uniformity. Various methods such as lapping and polishing, dry etching for anisotropic etching, and wet etching ([20%] C6H8O7 : H2O2 = 5:1) for high selectivity backside etching [5] are employed. A high transmittance of 80% over the large aperture area ($5{\times}5mm^2$) can be obtained with good uniformity through optimized backside etching method. These results reveal that the proposed methods for backside etching can etch the substrate over a large area with high uniformity, and the EAM fabricated by using backside etching method is an excellent candidate as optical shutter for 3D imaging systems.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.299.2-299.2
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• 2013

We investigated the potassium remaining on a crystalline silicon solar cell after potassium hydroxide (KOH) etching and its effect on the lifetime of the solar cell. KOH etching is generally used to remove the saw damage caused by cutting a Si ingot; it can also be used to etch the rear side of a textured crystalline silicon solar cell before atomic layer-deposited Al2O3 growth. However, the potassium remaining after KOH etching is known to be detrimental to the efficiency of Si solar cells. In this study, we etched a crystalline silicon solar cell in three ways in order to determine the effect of the potassium remnant on the efficiency of Si solar cells. After KOH etching, KOH and tetramethylammonium hydroxide (TMAH) were used to etch the rear side of a crystalline silicon solar cell. To passivate the rear side, an Al2O3 layer was deposited by atomic layer deposition (ALD). After ALD Al2O3 growth on the KOH-etched Si surface, we measured the lifetime of the solar cell by quasi steady-state photoconductance (QSSPC, Sinton WCT-120) to analyze how effectively the Al2O3 layer passivated the interface of the Al2O3 layer and the Si surface. Secondary ion mass spectroscopy (SIMS) was also used to measure how much potassium remained on the surface of the Si wafer and at the interface of the Al2O3 layer and the Si surface after KOH etching and wet cleaning.