• Title/Summary/Keyword: Wafer profile

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Profile Simulation in Mono-crystalline Silicon Wafer Grinding (실리콘 웨이퍼 연삭의 형상 시뮬레이션)

  • 김상철;이상직;정해도;최헌종;이석우
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.98-101
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    • 2003
  • As the ultra precision grinding can be applied to wafering process by the refinement of the abrasive. the development of high stiffness equipment and grinding skill, the conventional wafering process which consists of lapping, etching, 1st, 2nd and 3rd polishing could be exchanged to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Futhermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focused on the flatness of the ground wafer. Generally, the ground wafer has concave profile because of the difference of wheel path density, grinding temperature and elastic deformation of the equiptment. Tilting mathod is applied to avoid such non-uniform material removes. So, in this paper, the geometric analysis on grinding process is carried out, and then, we can predict the profile of th ground wafer by using profile simulation.

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Profile Simulation in Mono-crystalline Silicon Wafer Grinding (실리콘 웨이퍼 연삭의 형상 시뮬레이션)

  • Kim Sang Chul;Lee Sang Jik;Jeong Hae Do;Choi Heon Zong;Lee Seok Woo
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.10
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    • pp.26-33
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    • 2004
  • Ultra precision grinding technology has been developed from the refinement of the abrasive, the development of high stiffness equipment and grinding skill. The conventional wafering process which consists of lapping, etching, 1 st, 2nd and 3rd polishing has been changed to the new process which consists of precision surface grinding, final polishing and post cleaning. Especially, the ultra precision grinding of wafer improves the flatness of wafer and the efficiency of production. Furthermore, it has been not only used in bare wafer grinding, but also applied to wafer back grinding and SOI wafer grinding. This paper focuses on the flatness of the ground wafer. Generally, the ground wafer has concave pronto because of the difference of wheel path density, grinding temperature and elastic deformation of the equipment. Wafer tilting is applied to avoid non-uniform material removal. Through the geometric analysis of wafer grinding process, the profile of the ground wafer is predicted by the development of profile simulator.

Effects of CMP Retaining Ring Material on the Performance of Wafer Polishing (CMP용 리테이닝 링의 재질이 웨이퍼의 연마성능에 미치는 영향)

  • Park, Ki-Won;Kim, Eun-young;Park, Dong-Sam
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.19 no.3
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    • pp.22-28
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    • 2020
  • This paper investigates the effects of retaining ring materials, particularly PPS and PEEK, used in the CMP process, on wafer polishing and ring wear. CMP can be performed using bonded type retaining rings made with PPS or injection molding type retaining rings made with PEEK. In this study, after polishing a wafer with a PPS retaining ring, the average profile height of the wafer was 0.098 ㎛ less than that of the wafer polished with a PEEK retaining ring, implying that PPS retaining rings achieve a higher polishing rate. In addition, the center area of the wafer profile had less deviation and improved flatness after polishing with the PPS ring. These results indicate that a higher polishing rate and smaller profile height deviation can be achieved using retaining rings made with PPS compared to retaining rings made with PEEK. Therefore, with semiconductor circuit patterns becoming finer and wafer sizes becoming larger, the use of PPS in CMP retaining rings can obtain more stable wafer polishing results compared to that of PEEK.

Improvement of Vibration Performance for Wafer Transfer Robot using Frequency Analysis of Motion Profile (모션프로파일의 주파수분석을 통한 웨이퍼 이송로봇의 진동성능 향상)

  • Shin, Dongwon;Yun, Jang Kyu
    • Journal of the Korean Society for Precision Engineering
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    • v.31 no.8
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    • pp.697-703
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    • 2014
  • This paper is study of solving vibration problem occurred in moving hand of wafer transfer robot in semiconductor manufacturing line. Long settling time for decreasing vibration makes low production rate, and moreover the excessive vibration of hand sometimes breaks the wafer in a cassette. The ways of reducing the moving speed and changing the type of motion profile did not help for lessening vibration. Therefore, we analyzed the mechanical property of the hand such as natural frequency, and frequency component of the motion profile currently used in the manufacturing line. In several conditions of motion profile, we found the best condition of which the frequency component in near of natural frequency of the hand is minimal and this induced small vibration in moving hand. The results were verified theoretically and experimentally using frequency analysis.

Preparation of 5-Fluorouracil-Loaded Poly(L-lactide-co-glycolide) Wafer and Evaluation of In Vitro Release Behavior

  • Lee, Jin-Soo;Chae, Gang-Soo;An, Tae-Kun;Gilson Khang;Cho, Sun-Hang;Lee, Hai-Bang
    • Macromolecular Research
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    • v.11 no.3
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    • pp.183-188
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    • 2003
  • The controlled delivery of anticancer agents using biodegradable polymeric implant has been developed to solve the problem of penetration of blood brain barrier and severe systemic toxicity. This study was performed to prepare 5-FU-loaded poly (L-lactide-co-glycolide) (PLGA) wafer fabricated microparticles prepared by two different method and to evaluate their release profile for the application of the treatment of brain tumor. 5-FU-loaded PLGA microparticles were characterized by scanning electron microscopy (SEM), powder X-ray diffraction (XRD), and differential scanning calorimetry (DSC). SEM observation of the 5-FU-loaded PLGA microparticles prepared by rotary solvent evaporation method showed that 5-FU was almost surrounded by PLGA and significant reduction of crystallinity of 5-FU was confirmed by XRD. In case of release profile of 5-FU from 5-FU-loaded PLGA wafer fabricated microparticles prepared by mechanical mixing, the release profile of 5-FU followed near first order release kinetics. In contrast to the above result, release profile of 5-FU from 5-FU-loaded PLGA wafer fabricated microparticles prepared by rotary solvent evaporation method followed near zero order release kinetics. These results indicate that preparation method of the 5-FU-loaded PLGA microparticles to fabricate into wafers was contributed to drug release profile.

A Study on Pad Profile Variation Using Kinematical Analysis on Swing Ann Conditioner (스윙 암 컨디셔너의 기구학적 해석을 통한 CMP 패드 프로파일 변화에 관한 연구)

  • Oh, Ji-Heon;Kim, Yong-Min;Lee, Ho-Jun;Lee, Sang-Jik;Kim, Hyoung-Jae;Jeong, Hae-Do
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.47-48
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    • 2007
  • A CMP Process has many factors that affect result of a polished wafer. Dominant factors are velocity, pressure and temperature in process. A pad profile is also considered as affecting factor of CMP. Accoding to variation of a pad profile, the each pan of a wafer is differently pressured. It appears to affect the uniformity of a wafer. A pad profile varies as a swing arm conditioner which have been ordinarily used in industry. A swing arm conditioner has several sectors in its swing path. This study aims that a wafer get a good uniformity as swing arm conditioner's path on pad is analyzed and simulated. Through the simulation, tendency of pad profile after conditioning will be predicted and the result of simulation compared with the result of experiment. The optimized pad profile would be made by to vary swing arm's velocity on each sector. In order to maintain the optimized profile, conditioner design or swing arm's velocity should be changed and designed.

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Temperature Uniformity Control of Wafer During Vacuum Soldering Process (진공 솔더링 공정 중 웨이퍼 온도균일화 제어)

  • Kang, Min Sig;Jee, Won Ho;Yoon, Wo Hyun
    • Journal of the Semiconductor & Display Technology
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    • v.11 no.2
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    • pp.63-69
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    • 2012
  • As decreasing size of chips, the need of wafer level packaging is increased in semi-conductor and display industries. Temperature uniformity is a crucial factor in vacuum soldering process to guarantee quality of bonding between chips and wafer. In this paper, a stepwise iterative algorithm has been suggested to obtain output profile of each heat source. Since this algorithm is based on open-loop stepwise iterative experimental technique, it is easier to implement and cost effective than real time feedback controls. Along with some experiments, it was shown that the suggested algorithm can remarkably improve temperature uniformity of wafer during whole heating process compared with the ordinary manual trial-and error method.

Etching Method of Thin Film on the Backside of Wafer Using Single Wafer Processing Tool (매엽식 방법을 이용한 웨이퍼 후면의 박막 식각)

  • Ahn, Young-Ki;Kim, Hyun-Jong;Koo, Kyo-Woog;Cho, Jung-Keun
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.2 s.15
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    • pp.47-49
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    • 2006
  • Various methods of making thin film is being used in semiconductor manufacturing process. The most common method in this field includes CVD(Chemical Vapor Deposition) and PVD(Physical Vapor Deposition). Thin film is deposited on both the backside and the frontside of wafers. The thin film deposited on the backside has poor thickness profile, and can contaminate wafers in the following processes. If wafers with the thin film remaining on the backside are immersed in batch type process tank, the thin film fall apart from the backside and contaminate the nearest wafer. Thus, it is necessary to etch the backside of the wafer selectively without etching the frontside, and chemical injection nozzle positioned under the wafer can perform the backside etching. In this study, the backside chemical injection nozzle with optimized chemical injection profile is built for single wafer tool. The evaluation of this nozzle, performed on $Si_3N_4$ layer deposited on the backside of the wafer, shows the etching rate uniformity of less than 5% at the etching rate of more than $1000{\AA}$.

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